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Merge pull request #92 from dapeng-mi/master
Support Intel GNR & SRF platforms
2 parents 15c81a8 + 38fafde commit 3c8b21f

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7 files changed

+144
-35
lines changed

7 files changed

+144
-35
lines changed

‎Makefile.am

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,7 @@ libnumatop_la_SOURCES += \
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x86/include/nhm.h \
6565
x86/include/skl.h \
6666
x86/include/snb.h \
67+
x86/include/srf.h \
6768
x86/include/types.h \
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x86/include/util.h \
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x86/include/wsm.h \
@@ -73,6 +74,7 @@ libnumatop_la_SOURCES += \
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x86/plat.c \
7475
x86/skl.c \
7576
x86/snb.c \
77+
x86/srf.c \
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x86/ui_perf_map.c \
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x86/util.c \
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x86/wsm.c \

‎x86/include/skl.h

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Original file line numberDiff line numberDiff line change
@@ -51,10 +51,6 @@ extern void spr_profiling_config(perf_count_id_t, struct _plat_event_config *);
5151
extern void spr_ll_config(struct _plat_event_config *);
5252
extern int spr_offcore_num(void);
5353

54-
extern void emr_profiling_config(perf_count_id_t, struct _plat_event_config *);
55-
extern void emr_ll_config(struct _plat_event_config *);
56-
extern int emr_offcore_num(void);
57-
5854
#ifdef __cplusplus
5955
}
6056
#endif

‎x86/include/srf.h

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@@ -0,0 +1,50 @@
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/*
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* Copyright (c) 2024, Intel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
5+
* modification, are permitted provided that the following conditions are met:
6+
*
7+
* * Redistributions of source code must retain the above copyright notice,
8+
* this list of conditions and the following disclaimer.
9+
* * Redistributions in binary form must reproduce the above copyright
10+
* notice, this list of conditions and the following disclaimer in the
11+
* documentation and/or other materials provided with the distribution.
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* * Neither the name of Intel Corporation nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19+
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20+
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21+
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22+
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23+
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24+
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25+
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26+
* POSSIBILITY OF SUCH DAMAGE.
27+
*/
28+
29+
#ifndef _NUMATOP_INTEL_SRF_H
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#define _NUMATOP_INTEL_SRF_H
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32+
#ifdef __cplusplus
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extern "C" {
34+
#endif
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36+
#include <sys/types.h>
37+
#include <inttypes.h>
38+
#include "../../common/include/types.h"
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40+
struct _plat_event_config;
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42+
extern void srf_profiling_config(perf_count_id_t, struct _plat_event_config *);
43+
extern void srf_ll_config(struct _plat_event_config *);
44+
extern int srf_offcore_num(void);
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46+
#ifdef __cplusplus
47+
}
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#endif
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50+
#endif /* _NUMATOP_INTEL_SRF_H */

‎x86/include/types.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -48,12 +48,14 @@ typedef enum {
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CPU_ICX,
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CPU_SPR,
5050
CPU_EMR,
51+
CPU_GNR,
52+
CPU_SRF,
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CPU_ZEN,
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CPU_ZEN3,
5355
CPU_ZEN4
5456
} cpu_type_t;
5557

56-
#define CPU_TYPE_NUM 16
58+
#define CPU_TYPE_NUM 18
5759

5860
typedef enum {
5961
PERF_COUNT_INVALID = -1,

‎x86/plat.c

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,7 @@
3636
#include "include/snb.h"
3737
#include "include/bdw.h"
3838
#include "include/skl.h"
39+
#include "include/srf.h"
3940
#include "include/zen.h"
4041

4142
pfn_plat_profiling_config_t
@@ -52,7 +53,9 @@ s_plat_profiling_config[CPU_TYPE_NUM] = {
5253
skl_profiling_config,
5354
icx_profiling_config,
5455
spr_profiling_config,
55-
emr_profiling_config,
56+
spr_profiling_config, /* EMR */
57+
spr_profiling_config, /* GNR */
58+
srf_profiling_config,
5659
zen_profiling_config,
5760
zen3_profiling_config,
5861
zen4_profiling_config
@@ -72,7 +75,9 @@ s_plat_ll_config[CPU_TYPE_NUM] = {
7275
skl_ll_config,
7376
icx_ll_config,
7477
spr_ll_config,
75-
emr_ll_config,
78+
spr_ll_config, /* EMR */
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spr_ll_config, /* GNR */
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srf_ll_config,
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zen_ll_config,
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zen_ll_config,
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zen_ll_config
@@ -92,7 +97,9 @@ s_plat_offcore_num[CPU_TYPE_NUM] = {
9297
skl_offcore_num,
9398
icx_offcore_num,
9499
spr_offcore_num,
95-
emr_offcore_num,
100+
spr_offcore_num, /* EMR */
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spr_offcore_num, /* GNR */
102+
srf_offcore_num,
96103
zen_offcore_num,
97104
zen_offcore_num,
98105
zen_offcore_num
@@ -199,6 +206,12 @@ cpu_type_get(void)
199206
case 207:
200207
type = CPU_EMR;
201208
break;
209+
case 173:
210+
type = CPU_GNR;
211+
break;
212+
case 175:
213+
type = CPU_SRF;
214+
break;
202215
}
203216
} else if (family == 23) { /* Family 17h */
204217
type = CPU_ZEN;
@@ -252,6 +265,8 @@ plat_detect(void)
252265
case CPU_ICX:
253266
case CPU_SPR:
254267
case CPU_EMR:
268+
case CPU_GNR:
269+
case CPU_SRF:
255270
case CPU_ZEN:
256271
case CPU_ZEN3:
257272
case CPU_ZEN4:

‎x86/skl.c

Lines changed: 1 addition & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -63,14 +63,6 @@ static plat_event_config_t s_spr_config[PERF_COUNT_NUM] = {
6363
{ PERF_TYPE_RAW, 0x012B, 0x53, 0x104000001, 0, 0, "off_core_response_1" }
6464
};
6565

66-
static plat_event_config_t s_emr_config[PERF_COUNT_NUM] = {
67-
{ PERF_TYPE_HARDWARE, PERF_COUNT_HW_CPU_CYCLES, 0x53, 0, 0, 0, "cpu_clk_unhalted.core" },
68-
{ PERF_TYPE_RAW, 0x012A, 0x53, 0x730000001, 0, 0, "off_core_response_0" },
69-
{ PERF_TYPE_HARDWARE, PERF_COUNT_HW_REF_CPU_CYCLES, 0x53, 0, 0, 0, "cpu_clk_unhalted.ref" },
70-
{ PERF_TYPE_HARDWARE, PERF_COUNT_HW_INSTRUCTIONS, 0x53, 0, 0, 0, "instr_retired.any" },
71-
{ PERF_TYPE_RAW, 0x012B, 0x53, 0x104000001, 0, 0, "off_core_response_1" }
72-
};
73-
7466
static plat_event_config_t s_skl_ll = {
7567
PERF_TYPE_RAW, 0x01CD, 0x53, LL_THRESH, 0, 1, "mem_trans_retired.latency_above_threshold"
7668
};
@@ -93,12 +85,6 @@ spr_profiling_config(perf_count_id_t perf_count_id, plat_event_config_t *cfg)
9385
plat_config_get(perf_count_id, cfg, s_spr_config);
9486
}
9587

96-
void
97-
emr_profiling_config(perf_count_id_t perf_count_id, plat_event_config_t *cfg)
98-
{
99-
plat_config_get(perf_count_id, cfg, s_emr_config);
100-
}
101-
10288
void
10389
skl_ll_config(plat_event_config_t *cfg)
10490
{
@@ -117,12 +103,6 @@ spr_ll_config(plat_event_config_t *cfg)
117103
skl_ll_config(cfg);
118104
}
119105

120-
void
121-
emr_ll_config(plat_event_config_t *cfg)
122-
{
123-
skl_ll_config(cfg);
124-
}
125-
126106
int
127107
skl_offcore_num(void)
128108
{
@@ -139,10 +119,4 @@ int
139119
spr_offcore_num(void)
140120
{
141121
return skl_offcore_num();
142-
}
143-
144-
int
145-
emr_offcore_num(void)
146-
{
147-
return skl_offcore_num();
148-
}
122+
}

‎x86/srf.c

Lines changed: 70 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,70 @@
1+
/*
2+
* Copyright (c) 2024, Intel Corporation
3+
*
4+
* Redistribution and use in source and binary forms, with or without
5+
* modification, are permitted provided that the following conditions are met:
6+
*
7+
* * Redistributions of source code must retain the above copyright notice,
8+
* this list of conditions and the following disclaimer.
9+
* * Redistributions in binary form must reproduce the above copyright
10+
* notice, this list of conditions and the following disclaimer in the
11+
* documentation and/or other materials provided with the distribution.
12+
* * Neither the name of Intel Corporation nor the names of its contributors
13+
* may be used to endorse or promote products derived from this software
14+
* without specific prior written permission.
15+
*
16+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17+
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19+
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20+
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21+
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22+
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23+
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24+
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25+
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26+
* POSSIBILITY OF SUCH DAMAGE.
27+
*/
28+
29+
/* This file contains the bdw platform specific functions. */
30+
31+
#include <inttypes.h>
32+
#include <stdlib.h>
33+
#include <sys/types.h>
34+
#include <stdio.h>
35+
#include <unistd.h>
36+
#include <string.h>
37+
#include <strings.h>
38+
#include "../common/include/os/linux/perf_event.h"
39+
#include "../common/include/os/plat.h"
40+
#include "include/srf.h"
41+
42+
static plat_event_config_t s_srf_config[PERF_COUNT_NUM] = {
43+
{ PERF_TYPE_HARDWARE, PERF_COUNT_HW_CPU_CYCLES, 0x53, 0, 0, 0, "cpu_clk_unhalted.core" },
44+
{ PERF_TYPE_RAW, 0x01B7, 0x53, 0x730000001, 0, 0, "off_core_response_0" },
45+
{ PERF_TYPE_HARDWARE, PERF_COUNT_HW_REF_CPU_CYCLES, 0x53, 0, 0, 0, "cpu_clk_unhalted.ref" },
46+
{ PERF_TYPE_HARDWARE, PERF_COUNT_HW_INSTRUCTIONS, 0x53, 0, 0, 0, "instr_retired.any" },
47+
{ PERF_TYPE_RAW, 0x02B7, 0x53, 0x184000001, 0, 0, "off_core_response_1" }
48+
};
49+
50+
static plat_event_config_t s_srf_ll = {
51+
PERF_TYPE_RAW, 0x05D0, 0x53, LL_THRESH, 0, 1, "mem_trans_retired.latency_above_threshold"
52+
};
53+
54+
void
55+
srf_profiling_config(perf_count_id_t perf_count_id, plat_event_config_t *cfg)
56+
{
57+
plat_config_get(perf_count_id, cfg, s_srf_config);
58+
}
59+
60+
void
61+
srf_ll_config(plat_event_config_t *cfg)
62+
{
63+
memcpy(cfg, &s_srf_ll, sizeof (plat_event_config_t));
64+
}
65+
66+
int
67+
srf_offcore_num(void)
68+
{
69+
return (2);
70+
}

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