[SYCL-MLIR] Improve code generation for the rest of binary operators #7487
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victor-eds
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Nov 22, 2022
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Almost all of the new lines are tests. |
whitneywhtsang
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etiotto
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9ac759f improved code generation for addition and subtraction. This commit addresses the rest of binary arithmetic operators (mul, div, rem, shl, shr, and, or, xor): - Enable code generatio for mul and div operators and vector operands; - Mask shl and shr operands in OpenCL - Always generate signed/unsigned operations for vector operands. Signed-off-by: Victor Perez <victor.perez@codeplay.com>
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9ac759f improved code generation for addition and subtraction. This commit addresses the rest of binary arithmetic operators (mul, div, rem, shl, shr, and, or, xor):
Signed-off-by: Victor Perez victor.perez@codeplay.com