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[SYCL] Enable discard_events mode for the Level Zero #6533

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Merged
merged 7 commits into from
Aug 22, 2022
Merged

[SYCL] Enable discard_events mode for the Level Zero #6533

merged 7 commits into from
Aug 22, 2022

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againull
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@againull againull commented Aug 5, 2022 •
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  • Teach the Level Zero plugin piEnqueue* functions to accept nullptr instead of a pointer to the output event. In this case event is created internally and is not visible externally.
  • Introduce RefCountExternal for pi_event which allows to track external references to an event. It allows to do some optimizations if we know that event is not externally visible. These optimizations are going to be implemented in subsequent PRs.
  • Don't create proxy event for batch if there are no externally visible events in the batch.

@againull againull requested review from a team as code owners August 5, 2022 16:50
@againull againull requested a review from sergey-semenov August 5, 2022 16:50
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againull commented Aug 5, 2022

/verify with intel/llvm-test-suite#1132

@againull againull requested a review from smaslov-intel August 5, 2022 16:59
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againull commented Aug 5, 2022

/verify with intel/llvm-test-suite#1132

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againull commented Aug 5, 2022

/verify with intel/llvm-test-suite#1132

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againull commented Aug 8, 2022

SYCL/Plugin/level_zero_events_caching.cpp failure is unrelated to this PR, fix is uploaded for review here: intel/llvm-test-suite#1138

HIP backend failures are unrelated because changes are isolated to L0 plugin.

smaslov-intel
smaslov-intel reviewed Aug 9, 2022
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@againull againull requested a review from smaslov-intel August 10, 2022 00:02
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@smaslov-intel Could you please review this PR?

@againull againull mentioned this pull request Aug 11, 2022
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smaslov-intel
smaslov-intel reviewed Aug 15, 2022
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smaslov-intel
smaslov-intel reviewed Aug 15, 2022
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smaslov-intel
smaslov-intel reviewed Aug 15, 2022
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smaslov-intel
smaslov-intel reviewed Aug 15, 2022
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smaslov-intel
smaslov-intel reviewed Aug 15, 2022
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sycl/plugins/level_zero/pi_level_zero.hpp Outdated
@@ -1374,6 +1377,10 @@ struct _pi_event : _pi_object {
// being visible to the host at all.
bool Completed = {false};

// Indicates that event is internal, i.e. it is visible inside the L0 plugin
// only.
bool Internal = {false};
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Should we instead do similar as we do for queue

llvm/sycl/plugins/level_zero/pi_level_zero.hpp

Line 1038 in bfc7e98

pi_uint32 RefCountExternal{1};
?

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If we do optimization (2-event model) only for discarded events in in-order queue then bool variable seems enough. But if we want to extend optimization for events which are not discarded then we need this ref count of external references to know when event is not externally visible anymore.
So I used the ext ref count approach as suggested.

@againull
Address review comments
a0d9e50 
* Use RefCountExternal to keep track of external references
* Rename PI_EXT_ONEAPI_QUEUE_DISCARD_EVENTS_MODE_ENABLE -> PI_EXT_ONEAPI_QUEUE_DISCARD_EVENTS
* Pass property to all backends
@againull
Merge remote-tracking branch 'origin/sycl' into discard
28e0a66
@againull
Fix typos
6fce540
@againull againull requested a review from smaslov-intel August 19, 2022 22:38
smaslov-intel
smaslov-intel reviewed Aug 22, 2022
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sycl/plugins/level_zero/pi_level_zero.cpp
@@ -686,7 +690,7 @@ inline static pi_result createEventAndAssociateQueue(
// Append this Event to the CommandList, if any
if (CommandList != Queue->CommandListMap.end()) {
CommandList->second.append(*Event);
PI_CALL(piEventRetain(*Event));
(*Event)->RefCount.increment();
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Just curious: why is this change needed?

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piEventRetain increments external ref count, but we need to increment only internal ref count here. Same logic as for pi_queue.

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smaslov-intel approved these changes Aug 22, 2022
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LGTM

@againull againull merged commit 1372120 into intel:sycl Aug 22, 2022
@againull againull deleted the discard branch December 3, 2022 00:11
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@smaslov-intel smaslov-intel smaslov-intel approved these changes

@sergey-semenov sergey-semenov Awaiting requested review from sergey-semenov sergey-semenov is a code owner automatically assigned from intel/llvm-reviewers-runtime

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