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[SYCL][FPGA] Refactor [[intel::max_work_group_size()]] attribute implementation #5392
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42491e6
[SYCL[FPGA] Refactor of max-work-group-size attribute implementation
smanna12 efa3a02
fix format errors
smanna12 e0b27d5
Fix clang format errors
smanna12 e4424de
address review comments
smanna12 852bcf0
Fix clang format issues
smanna12 ecc68cc
Fix clang format issues
smanna12 9eee41c
Fix Crash when merging attributes
smanna12 39bb37f
Fix format errors
smanna12 ab08b9b
Revert unnecessary change
smanna12 4088a60
Add comment in the tests
smanna12 862e3f2
Address review comments
smanna12 18abeba
Fix format errors
smanna12 2330ed3
Fix Clang format errors
smanna12 030ab5e
Address review comments
smanna12 931ef0e
Fix format errors
smanna12 c1ba909
update comment
smanna12 d98b6dc
Address @aaron's review comments
smanna12 949027c
Fix clang format errors
smanna12 15e6183
Update tests
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