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[SYCL] Enable SPV_INTEL_runtime_aligned for FPGA only #5299

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merged 1 commit into from
Jan 14, 2022

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Signed-off-by: Dmitry Sidorov dmitry.sidorov@intel.com

…A H/W

Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
@MrSidims MrSidims requested a review from a team as a code owner January 13, 2022 08:02
@MrSidims MrSidims changed the title [SYCL] Make SPV_INTEL_runtime_aligned be added by driver only for FPGA H/W [SYCL] Make SPV_INTEL_runtime_aligned be added only for FPGA H/W Jan 13, 2022
@bader bader changed the title [SYCL] Make SPV_INTEL_runtime_aligned be added only for FPGA H/W [SYCL] Enable SPV_INTEL_runtime_aligned for FPGA only Jan 13, 2022
@MrSidims MrSidims force-pushed the SPV_INTEL_runtime_aligned branch from d826c04 to 8b61262 Compare January 13, 2022 08:06
@MrSidims MrSidims requested a review from a team as a code owner January 13, 2022 08:06
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/summary:run

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Created to fix pre-commit issues from #5111 (this PR added here as well).

@MrSidims MrSidims marked this pull request as draft January 13, 2022 08:08
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Looks like pre-commit is passing with the clang FE patch (CUDA failure is a known issue). Reverting back to only Driver changes.

@MrSidims MrSidims force-pushed the SPV_INTEL_runtime_aligned branch from 8b61262 to d826c04 Compare January 13, 2022 13:49
@MrSidims MrSidims marked this pull request as ready for review January 13, 2022 13:50
@MrSidims MrSidims removed the request for review from a team January 13, 2022 13:50
@bader bader merged commit 3651971 into intel:sycl Jan 14, 2022
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3 participants