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[SYCL][NFC] Factor out GenXIntrinsics git repo tag. #3351

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Merged
merged 1 commit into from
Mar 12, 2021

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This is needed for more flexible vc-intrinsics repo management during custom internal builds which may use different commit hash.

Signed-off-by: Konstantin S Bobrovsky konstantin.s.bobrovsky@intel.com

Signed-off-by: Konstantin S Bobrovsky <konstantin.s.bobrovsky@intel.com>
@kbobrovs kbobrovs requested a review from vladimirlaz March 12, 2021 05:08
@kbobrovs kbobrovs merged commit 2287e4e into intel:sycl Mar 12, 2021
alexbatashev pushed a commit to alexbatashev/llvm that referenced this pull request Mar 15, 2021
* upstream/sycl:
  Add ITT stubs and wrappers for SPIR-V devices (intel#3279)
  [SYCL] Add zero argument version of buffer::reinterpret() for SYCL 2020 (intel#3333)
  [SYCL] Restore old behavior of get() method (intel#3356)
  [Driver][SYCL][FPGA] Improve FPGA AOT when using Triple (intel#3330)
  [SYCL] Revert support for pinned_host_memory extension in Level-Zero backend. Make it a NOP (intel#3349)
  [SYCL] Remove redundant build options processing (intel#3342)
  [SYCL][NFC] Factor out GenXIntrinsics git repo tag. (intel#3351)
  [SYCL] Add coarse-grained debug aid for finding imbalance in Level-Zero alloc/free (intel#3334)
  [SYCL] Sub-group load/store for raw pointers (intel#3255)
  [SYCL] Fix more unused variables warnings (intel#3352)
  [BuildBot] Uplift CPU/FPGAEMU RT version for CI Process  (intel#3338)
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3 participants