[SYCL] Add experimental flag to enable front-end optimizations #1376
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Fznamznon
reviewed
Mar 24, 2020
Fznamznon
previously approved these changes
Mar 24, 2020
NOTE: This flag is not exposed to the driver and not intended for users. It's added to make experiments and identify issues with optimizations. Signed-off-by: Alexey Bader <alexey.bader@intel.com>
Signed-off-by: Alexey Bader <alexey.bader@intel.com>
Fznamznon
reviewed
Mar 25, 2020
| @@ -1,4 +1,4 @@ | |||
| // RUN: %clang_cc1 -fsycl -fsycl-is-device -triple spir64-unknown-unknown-sycldevice -emit-llvm -x c++ %s -o - | FileCheck %s | |||
| // RUN: %clang_cc1 -fsycl -fsycl-is-device -fsycl-enable-optimizations -triple spir64-unknown-unknown-sycldevice -emit-llvm -x c++ %s -o - | FileCheck %s | |||
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I don't get this change. If you want to test your new option, add specific test for it. I don't see why you adding this option to unrelated test and check noting.
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It's explained in the commit message.
"[SYCL] Update the test checking optimized LLVM IR"
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Ok, I see. No more questions about the change.
We added a test checking optimized IR. Does such test makes sense if we don't enable optimizations when compiling SYCL application?
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It still makes sense because it has a few checks matching asm, which are relevant as target independent optimizations do not optimize inline asm.
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Although I agree that it would be better to re-write the checks.
Fznamznon
approved these changes
Mar 25, 2020
alexbatashev
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Mar 27, 2020
…hinx * upstream/sycl: (357 commits) [Support] Implement a simple tabular data management library (intel#1358) [Support] Implement a property set I/O library (intel#1357) [SYCL] Fix buffer constructor using iterators (intel#1386) [SYCL][FPGA] Enable a set of loop attributes (intel#1312) [Driver][SYCL][FPGA] Proper dependency output location when given /Fo<dir> (intel#1346) [SPIR-V] Enabling SPIR-V builtin lookup in device SYCL mode (intel#1384) [SYCL][NFC] Unify setting kernel arguments (intel#1379) [SYCL][Doc] First revision of standard layout relaxation extension (intel#1344) [SYCL] Fixed sub-buffer alloca search (intel#1385) [SYCL][FPGA] Emit multiple IR variants for the IVDep attribute (intel#1383) [SYCL] Add experimental flag to enable front-end optimizations (intel#1376) [SYCL] Remove unexpected double in complex SPIR-V for float support (intel#1381) [SYCL] Default work-group sizes based on max (intel#952) [SYCL][CUDA] Fix usage of multiple backends in the same program (intel#1252) [SPIR-V] Add SPIR-V builtin definitions to the builtin lookup. [SPIR-V] Add macro definition when -fdeclare-spirv-builtins is activated [SYCL] Fix sycl_generic printing [SYCL] Support intel::reqd_work_group_size (intel#1328) [SYCL][NFC] Make the RT::PiPlugin object private (intel#1375) [SPIRV] Add convergent attribute to SPIR-V built-ins (intel#1373) ...
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NOTE: This flag is not exposed to the driver and not intended for users.
It's added to make experiments and identify issues with optimizations.
Signed-off-by: Alexey Bader alexey.bader@intel.com