Revert "Revert "Revert "[lld][Arm] Big Endian - Byte invariant support."""

This reverts commit f146763.

Author: Chenyang-L

lld/ELF/Arch/ARM.cpp

@@ -44,11 +44,8 @@ class ARM final : public TargetInfo {
   void relocate(uint8_t *loc, const Relocation &rel,
                 uint64_t val) const override;
 };
-enum class CodeState { Data = 0, Thumb = 2, Arm = 4 };
 } // namespace
 
-static DenseMap<InputSection *, SmallVector<const Defined *, 0>> sectionMap{};
-
 ARM::ARM() {
   copyRel = R_ARM_COPY;
   relativeRel = R_ARM_RELATIVE;
@@ -71,24 +68,16 @@ uint32_t ARM::calcEFlags() const {
   // The ABIFloatType is used by loaders to detect the floating point calling
   // convention.
   uint32_t abiFloatType = 0;
-
-  // Set the EF_ARM_BE8 flag in the ELF header, if ELF file is big-endian
-  // with BE-8 code.
-  uint32_t armBE8 = 0;
-
   if (config->armVFPArgs == ARMVFPArgKind::Base ||
       config->armVFPArgs == ARMVFPArgKind::Default)
     abiFloatType = EF_ARM_ABI_FLOAT_SOFT;
   else if (config->armVFPArgs == ARMVFPArgKind::VFP)
     abiFloatType = EF_ARM_ABI_FLOAT_HARD;
 
-  if (!config->isLE && config->armBe8)
-    armBE8 = EF_ARM_BE8;
-
   // We don't currently use any features incompatible with EF_ARM_EABI_VER5,
   // but we don't have any firm guarantees of conformance. Linux AArch64
   // kernels (as of 2016) require an EABI version to be set.
-  return EF_ARM_EABI_VER5 | abiFloatType | armBE8;
+  return EF_ARM_EABI_VER5 | abiFloatType;
 }
 
 RelExpr ARM::getRelExpr(RelType type, const Symbol &s,

lld/ELF/Config.h

@@ -203,7 +203,6 @@ struct Config {
   bool armHasMovtMovw = false;
   bool armJ1J2BranchEncoding = false;
   bool asNeeded = false;
-  bool armBe8 = false;
   BsymbolicKind bsymbolic = BsymbolicKind::None;
   bool callGraphProfileSort;
   bool checkSections;

lld/ELF/Driver.cpp

@@ -359,12 +359,9 @@ static void checkOptions() {
   if (config->fixCortexA8 && config->emachine != EM_ARM)
     error("--fix-cortex-a8 is only supported on ARM targets");
 
-  if (config->armBe8 && config->emachine != EM_ARM)
-    error("--be8 is only supported on ARM targets");
-
   if (config->fixCortexA8 && !config->isLE)
     error("--fix-cortex-a8 is not supported on big endian targets");
-
+  
   if (config->tocOptimize && config->emachine != EM_PPC64)
     error("--toc-optimize is only supported on PowerPC64 targets");
 
@@ -1124,7 +1121,6 @@ static void readConfigs(opt::InputArgList &args) {
                                             OPT_no_android_memtag_stack, false);
   config->androidMemtagMode = getMemtagMode(args);
   config->auxiliaryList = args::getStrings(args, OPT_auxiliary);
-  config->armBe8 = args.hasArg(OPT_be8);
   if (opt::Arg *arg =
           args.getLastArg(OPT_Bno_symbolic, OPT_Bsymbolic_non_weak_functions,
                           OPT_Bsymbolic_functions, OPT_Bsymbolic)) {

lld/ELF/Options.td

@@ -36,8 +36,6 @@ multiclass B<string name, string help1, string help2> {
 
 defm auxiliary: Eq<"auxiliary", "Set DT_AUXILIARY field to the specified name">;
 
-def be8: F<"be8">, HelpText<"write a Big Endian ELF file using BE8 format (AArch32 only)">;
-
 def Bno_symbolic: F<"Bno-symbolic">, HelpText<"Don't bind default visibility defined symbols locally for -shared (default)">;
 
 def Bsymbolic: F<"Bsymbolic">, HelpText<"Bind default visibility defined symbols locally for -shared">;

lld/ELF/OutputSections.cpp

@@ -496,12 +496,6 @@ void OutputSection::writeTo(uint8_t *buf, parallel::TaskGroup &tg) {
       else
         isec->writeTo<ELFT>(buf + isec->outSecOff);
 
-      // When in Arm BE8 mode, the linker has to convert the big-endian
-      // instructions to little-endian, leaving the data big-endian.
-      if (config->emachine == EM_ARM && !config->isLE && config->armBe8 &&
-          (flags & SHF_EXECINSTR))
-        convertArmInstructionstoBE8(isec, buf + isec->outSecOff);
-
       // Fill gaps between sections.
       if (nonZeroFiller) {
         uint8_t *start = buf + isec->outSecOff + isec->getSize();

lld/ELF/SyntheticSections.cpp

@@ -271,13 +271,6 @@ Defined *elf::addSyntheticLocal(StringRef name, uint8_t type, uint64_t value,
                            value, size, &section);
   if (in.symTab)
     in.symTab->addSymbol(s);
-
-  if (config->emachine == EM_ARM && !config->isLE && config->armBe8 &&
-      (section.flags & SHF_EXECINSTR))
-    // Adding Linker generated mapping symbols to the arm specific mapping
-    // symbols list.
-    addArmSyntheticSectionMappingSymbol(s);
-
   return s;
 }
 

lld/ELF/Target.h

@@ -224,10 +224,6 @@ uint64_t getPPC64TocBase();
 uint64_t getAArch64Page(uint64_t expr);
 void riscvFinalizeRelax(int passes);
 void mergeRISCVAttributesSections();
-void addArmInputSectionMappingSymbols();
-void addArmSyntheticSectionMappingSymbol(Defined *);
-void sortArmMappingSymbols();
-void convertArmInstructionstoBE8(InputSection *sec, uint8_t *buf);
 
 LLVM_LIBRARY_VISIBILITY extern const TargetInfo *target;
 TargetInfo *getTarget();

lld/ELF/Thunks.cpp

@@ -754,8 +754,7 @@ void ThumbV6MABSLongThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__Thumbv6MABSLongThunk_" + destination.getName()),
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
-  if (!getMayUseShortThunk())
-    addSymbol("$d", STT_NOTYPE, 8, isec);
+  addSymbol("$d", STT_NOTYPE, 8, isec);
 }
 
 void ThumbV6MABSXOLongThunk::writeLong(uint8_t *buf) {
@@ -806,8 +805,7 @@ void ThumbV6MPILongThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__Thumbv6MPILongThunk_" + destination.getName()),
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
-  if (!getMayUseShortThunk())
-    addSymbol("$d", STT_NOTYPE, 12, isec);
+  addSymbol("$d", STT_NOTYPE, 12, isec);
 }
 
 void ARMV5LongLdrPcThunk::writeLong(uint8_t *buf) {
@@ -820,8 +818,7 @@ void ARMV5LongLdrPcThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__ARMv5LongLdrPcThunk_" + destination.getName()),
             STT_FUNC, 0, isec);
   addSymbol("$a", STT_NOTYPE, 0, isec);
-  if (!getMayUseShortThunk())
-    addSymbol("$d", STT_NOTYPE, 4, isec);
+  addSymbol("$d", STT_NOTYPE, 4, isec);
 }
 
 void ARMV4ABSLongBXThunk::writeLong(uint8_t *buf) {
@@ -835,8 +832,7 @@ void ARMV4ABSLongBXThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__ARMv4ABSLongBXThunk_" + destination.getName()),
             STT_FUNC, 0, isec);
   addSymbol("$a", STT_NOTYPE, 0, isec);
-  if (!getMayUseShortThunk())
-    addSymbol("$d", STT_NOTYPE, 8, isec);
+  addSymbol("$d", STT_NOTYPE, 8, isec);
 }
 
 void ThumbV4ABSLongBXThunk::writeLong(uint8_t *buf) {
@@ -852,8 +848,7 @@ void ThumbV4ABSLongBXThunk::addSymbols(ThunkSection &isec) {
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
   addSymbol("$a", STT_NOTYPE, 4, isec);
-  if (!getMayUseShortThunk())
-    addSymbol("$d", STT_NOTYPE, 8, isec);
+  addSymbol("$d", STT_NOTYPE, 8, isec);
 }
 
 void ThumbV4ABSLongThunk::writeLong(uint8_t *buf) {
@@ -870,8 +865,7 @@ void ThumbV4ABSLongThunk::addSymbols(ThunkSection &isec) {
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
   addSymbol("$a", STT_NOTYPE, 4, isec);
-  if (!getMayUseShortThunk())
-    addSymbol("$d", STT_NOTYPE, 12, isec);
+  addSymbol("$d", STT_NOTYPE, 12, isec);
 }
 
 void ARMV4PILongBXThunk::writeLong(uint8_t *buf) {
@@ -888,8 +882,7 @@ void ARMV4PILongBXThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__ARMv4PILongBXThunk_" + destination.getName()),
             STT_FUNC, 0, isec);
   addSymbol("$a", STT_NOTYPE, 0, isec);
-  if (!getMayUseShortThunk())
-    addSymbol("$d", STT_NOTYPE, 12, isec);
+  addSymbol("$d", STT_NOTYPE, 12, isec);
 }
 
 void ARMV4PILongThunk::writeLong(uint8_t *buf) {
@@ -905,8 +898,7 @@ void ARMV4PILongThunk::addSymbols(ThunkSection &isec) {
   addSymbol(saver().save("__ARMv4PILongThunk_" + destination.getName()),
             STT_FUNC, 0, isec);
   addSymbol("$a", STT_NOTYPE, 0, isec);
-  if (!getMayUseShortThunk())
-    addSymbol("$d", STT_NOTYPE, 8, isec);
+  addSymbol("$d", STT_NOTYPE, 8, isec);
 }
 
 void ThumbV4PILongBXThunk::writeLong(uint8_t *buf) {
@@ -925,8 +917,7 @@ void ThumbV4PILongBXThunk::addSymbols(ThunkSection &isec) {
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
   addSymbol("$a", STT_NOTYPE, 4, isec);
-  if (!getMayUseShortThunk())
-    addSymbol("$d", STT_NOTYPE, 12, isec);
+  addSymbol("$d", STT_NOTYPE, 12, isec);
 }
 
 void ThumbV4PILongThunk::writeLong(uint8_t *buf) {
@@ -946,8 +937,7 @@ void ThumbV4PILongThunk::addSymbols(ThunkSection &isec) {
             STT_FUNC, 1, isec);
   addSymbol("$t", STT_NOTYPE, 0, isec);
   addSymbol("$a", STT_NOTYPE, 4, isec);
-  if (!getMayUseShortThunk())
-    addSymbol("$d", STT_NOTYPE, 16, isec);
+  addSymbol("$d", STT_NOTYPE, 16, isec);
 }
 
 // Use the long jump which covers a range up to 8MiB.

lld/ELF/Writer.cpp

@@ -2149,11 +2149,6 @@ template <class ELFT> void Writer<ELFT>::finalizeSections() {
     sec->finalize();
 
   script->checkMemoryRegions();
-
-  if (config->emachine == EM_ARM && !config->isLE && config->armBe8) {
-    addArmInputSectionMappingSymbols();
-    sortArmMappingSymbols();
-  }
 }
 
 // Ensure data sections are not mixed with executable sections when

lld/docs/ld.lld.1

@@ -88,8 +88,6 @@ Bind default visibility defined function symbols locally for
 .It Fl Bsymbolic-non-weak-functions
 Bind default visibility defined STB_GLOBAL function symbols locally for
 .Fl shared.
-.It Fl --be8
-Write a Big Endian ELF File using BE8 format(AArch32 only)
 .It Fl -build-id Ns = Ns Ar value
 Generate a build ID note.
 .Ar value

lld/test/ELF/arm-bl-v6.s

@@ -13,12 +13,6 @@
 // RUN: llvm-objdump --no-print-imm-hex -d --triple=armv6eb-none-linux-gnueabi --start-address=0x22100c --stop-address=0x221014 %t2 | FileCheck --check-prefix=CHECK-ARM2-EB %s
 // RUN: llvm-objdump --no-print-imm-hex -d --triple=thumbv6eb-none-linux-gnueabi %t2 --start-address=0x622000 --stop-address=0x622002 | FileCheck --check-prefix=CHECK-THUMB2 %s
 
-// RUN: ld.lld --be8 %t -o %t2
-// RUN: llvm-objdump --no-print-imm-hex -d --triple=armv6eb-none-linux-gnueabi --start-address=0x21000 --stop-address=0x21008 %t2 | FileCheck --check-prefix=CHECK-ARM1 %s
-// RUN: llvm-objdump --no-print-imm-hex -d --triple=thumbv6eb-none-linux-gnueabi %t2 --start-address=0x21008 --stop-address=0x2100c | FileCheck --check-prefix=CHECK-THUMB1 %s
-// RUN: llvm-objdump --no-print-imm-hex -d --triple=armv6eb-none-linux-gnueabi --start-address=0x22100c --stop-address=0x221014 %t2 | FileCheck --check-prefix=CHECK-ARM2-EB %s
-// RUN: llvm-objdump --no-print-imm-hex -d --triple=thumbv6eb-none-linux-gnueabi %t2 --start-address=0x622000 --stop-address=0x622002 | FileCheck --check-prefix=CHECK-THUMB2 %s
-
 /// On Arm v6 the range of a Thumb BL instruction is only 4 megabytes as the
 /// extended range encoding is not supported. The following example has a Thumb
 /// BL that is out of range on ARM v6 and requires a range extension thunk.

lld/test/ELF/arm-data-relocs.s

@@ -9,9 +9,6 @@
 // RUN: ld.lld %t.be.o %t256.be.o -o %t.be
 // RUN: llvm-objdump -s %t.be | FileCheck %s --check-prefixes=CHECK,BE
 
-// RUN: ld.lld --be8 %t.be.o %t256.be.o -o %t.be8
-// RUN: llvm-objdump -s %t.be8 | FileCheck %s --check-prefixes=CHECK,BE
-
 .globl _start
 _start:
 .section .R_ARM_ABS, "ax","progbits"

lld/test/ELF/arm-exidx-emit-relocs.s

@@ -9,10 +9,6 @@
 // RUN: llvm-objdump -s --triple=armv7aeb-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-EB %s
 // RUN: llvm-readelf --relocs %t2 | FileCheck -check-prefix=CHECK-RELOCS %s
 
-// RUN: ld.lld --be8 --emit-relocs %t -o %t2
-// RUN: llvm-objdump -s --triple=armv7aeb-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-EB %s
-// RUN: llvm-readelf --relocs %t2 | FileCheck -check-prefix=CHECK-RELOCS %s
-
 /// LLD does not support --emit-relocs for .ARM.exidx sections as the relocations
 /// from synthetic table entries won't be represented. Given the known use cases
 /// of --emit-relocs, relocating kernels, and binary analysis, the former doesn't

lld/test/ELF/arm-exidx-relocatable.s

@@ -10,8 +10,6 @@
 // Check that relocatable link maintains SHF_LINK_ORDER for big endian
 // RUN: ld.lld -r %t %tcantunwind -o %t4
 // RUN: llvm-readobj -S %t4 | FileCheck %s
-// RUN: ld.lld --be8 -r %t %tcantunwind -o %t4
-// RUN: llvm-readobj -S %t4 | FileCheck %s
 
 // Each assembler created .ARM.exidx section has the SHF_LINK_ORDER flag set
 // with the sh_link containing the section index of the executable section

lld/test/ELF/arm-exidx-sentinel-norelocatable.s

@@ -6,8 +6,6 @@
 // RUN: llvm-mc %s -triple=armv7eb-unknown-linux-gnueabi -mcpu=cortex-a8 -filetype=obj -o %t.o
 // RUN: ld.lld -r %t.o -o %t
 // RUN: llvm-readobj -S %t | FileCheck %s
-// RUN: ld.lld --be8 -r %t.o -o %t
-// RUN: llvm-readobj -S %t | FileCheck %s
 
 // Check that when doing a relocatable link we don't add a terminating entry
 // to the .ARM.exidx section

lld/test/ELF/arm-header.s

@@ -3,10 +3,6 @@
 # RUN: ld.lld %t.o -o %t1
 # RUN: llvm-readobj -h %t1 | FileCheck %s
 
-# RUN: llvm-mc -filetype=obj -triple=armv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t.o
-# RUN: ld.lld --be8 %t.o -o %t1
-# RUN: llvm-readobj -h %t1 | FileCheck -check-prefix=CHECK-EB %s
-
 # CHECK: Format: elf32-bigarm
 
 # CHECK: ElfHeader {
@@ -28,23 +24,3 @@
 
 # CHECK-NOT: 0x800000
 
-# CHECK-EB: Format: elf32-bigarm
-
-# CHECK-EB: ElfHeader {
-# CHECK-EB-NEXT:   Ident {
-# CHECK-EB-NEXT:     Magic: (7F 45 4C 46)
-# CHECK-EB-NEXT:     Class: 32-bit (0x1)
-# CHECK-EB-NEXT:     DataEncoding: BigEndian (0x2)
-# CHECK-EB-NEXT:     FileVersion: 1
-# CHECK-EB-NEXT:     OS/ABI: SystemV (0x0)
-# CHECK-EB-NEXT:     ABIVersion: 0
-# CHECK-EB-NEXT:     Unused: (00 00 00 00 00 00 00)
-# CHECK-EB-NEXT:   }
-
-# CHECK-EB:   Flags [ (0x5800200)
-# CHECK-EB-NEXT:     0x200
-# CHECK-EB-NEXT:     0x800000
-# CHECK-EB-NEXT:     0x1000000
-# CHECK-EB-NEXT:     0x4000000
-# CHECK-EB-NEXT:   ]
-

lld/test/ELF/arm-mov-relocs.s

@@ -13,11 +13,6 @@
 // RUN: ld.lld %t3 -o %t4
 // RUN: llvm-objdump --no-print-imm-hex -d %t4 --triple=thumbv7aeb-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
 
-// RUN: ld.lld --be8 %t -o %t2
-// RUN: llvm-objdump --no-print-imm-hex -d %t2 --triple=armv7aeb-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
-// RUN: ld.lld --be8 %t3 -o %t4
-// RUN: llvm-objdump --no-print-imm-hex -d %t4 --triple=thumbv7aeb-unknown-linux-gnueabi --no-show-raw-insn | FileCheck %s
-
 /// Test the following relocation pairs:
 ///  * R_ARM_MOVW_ABS_NC and R_ARM_MOVT_ABS
 ///  * R_ARM_MOVW_PREL_NC and R_ARM_MOVT_PREL