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Refactor translation and reverse translation of PipelineEnableINTEL for loops and functions (#2171)
Refactor SPIRVWriter to accept !disable_kernel_pipelining instead of !disable_loop_pipelining for function metadata, and !llvm.loop.intel.pipelining.disable instead of !llvm.loop.intel.pipelining.enable for loop metadata. Refactor SPIRVReader to emit !disable_kernel_pipelining instead of !disable_loop_pipelining for function metadata, and !llvm.loop.intel.pipelining.disable instead of !llvm.loop.intel.pipelining.enable for loop metadata. Relevant/Related intel/llvm PR: #11372 Original commit: KhronosGroup/SPIRV-LLVM-Translator@e68ddf7
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-15
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5 files changed

+14
-15
lines changed

‎llvm-spirv/lib/SPIRV/SPIRVInternal.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -411,7 +411,7 @@ const static char PreferDSP[] = "prefer_dsp";
411411
const static char PropDSPPref[] = "propagate_dsp_preference";
412412
const static char InitiationInterval[] = "initiation_interval";
413413
const static char MaxConcurrency[] = "max_concurrency";
414-
const static char DisableLoopPipelining[] = "disable_loop_pipelining";
414+
const static char PipelineKernel[] = "pipeline_kernel";
415415
const static char IntelFPGAIPInterface[] = "ip_interface";
416416
} // namespace kSPIR2MD
417417

‎llvm-spirv/lib/SPIRV/SPIRVReader.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4532,8 +4532,8 @@ bool SPIRVToLLVM::transFPGAFunctionMetadata(SPIRVFunction *BF, Function *F) {
45324532
if (BF->hasDecorate(DecorationPipelineEnableINTEL)) {
45334533
auto Literals = BF->getDecorationLiterals(DecorationPipelineEnableINTEL);
45344534
std::vector<Metadata *> MetadataVec;
4535-
MetadataVec.push_back(ConstantAsMetadata::get(getInt32(M, !Literals[0])));
4536-
F->setMetadata(kSPIR2MD::DisableLoopPipelining,
4535+
MetadataVec.push_back(ConstantAsMetadata::get(getInt32(M, Literals[0])));
4536+
F->setMetadata(kSPIR2MD::PipelineKernel,
45374537
MDNode::get(*Context, MetadataVec));
45384538
}
45394539
return true;

‎llvm-spirv/lib/SPIRV/SPIRVWriter.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1044,12 +1044,11 @@ void LLVMToSPIRVBase::transFPGAFunctionMetadata(SPIRVFunction *BF,
10441044
BF->addDecorate(new SPIRVDecorateMaxConcurrencyINTEL(BF, Invocations));
10451045
}
10461046
}
1047-
if (MDNode *DisableLoopPipelining =
1048-
F->getMetadata(kSPIR2MD::DisableLoopPipelining)) {
1047+
if (MDNode *PipelineKernel = F->getMetadata(kSPIR2MD::PipelineKernel)) {
10491048
if (BM->isAllowedToUseExtension(
10501049
ExtensionID::SPV_INTEL_fpga_invocation_pipelining_attributes)) {
1051-
size_t Disable = getMDOperandAsInt(DisableLoopPipelining, 0);
1052-
BF->addDecorate(new SPIRVDecoratePipelineEnableINTEL(BF, !Disable));
1050+
size_t Pipeline = getMDOperandAsInt(PipelineKernel, 0);
1051+
BF->addDecorate(new SPIRVDecoratePipelineEnableINTEL(BF, Pipeline));
10531052
}
10541053
}
10551054

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_kernel_attributes/intel_fpga_function_attributes.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010
;; intel::loop_fuse_independent(3),
1111
;; intel::initiation_interval(10),
1212
;; intel::max_concurrency(12),
13-
;; intel::disable_loop_pipelining]] void operator()() {}
13+
;; intel::pipeline_kernel]] void operator()() {}
1414
;; };
1515
;;
1616
;; template <typename name, typename Func>
@@ -62,23 +62,23 @@
6262
; CHECK-LLVM-SAME: !stall_enable ![[ONEMD:[0-9]+]] !loop_fuse ![[FUSE:[0-9]+]]
6363
; CHECK-LLVM-SAME: !initiation_interval ![[II:[0-9]+]]
6464
; CHECK-LLVM-SAME: !max_concurrency ![[MAXCON:[0-9]+]]
65-
; CHECK-LLVM-SAME: !disable_loop_pipelining ![[ONEMD]]
65+
; CHECK-LLVM-SAME: !pipeline_kernel ![[ONEMD2:[0-9]+]]
6666
; CHECK-LLVM-SAME: !max_work_group_size ![[MAXWG:[0-9]+]]
6767
; CHECK-LLVM-SAME: !no_global_work_offset ![[OFFSET:[0-9]+]]
6868
; CHECK-LLVM-SAME: !max_global_work_dim ![[ONEMD]] !num_simd_work_items ![[NUMSIMD:[0-9]+]]
6969
; CHECK-LLVM-SAME: !scheduler_target_fmax_mhz ![[MAXMHZ:[0-9]+]]
7070
; CHECK-LLVM-NOT: define spir_kernel void {{.*}}kernel_name2 {{.*}} !no_global_work_offset {{.*}}
7171
; CHECK-LLVM: define spir_kernel void {{.*}}kernel_name3()
72-
; CHECK-LLVM-SAME: !disable_loop_pipelining ![[ONEMD2:[0-9]+]]
72+
; CHECK-LLVM-SAME: !pipeline_kernel ![[ONEMD]]
7373
; CHECK-LLVM: ![[OFFSET]] = !{}
7474
; CHECK-LLVM: ![[ONEMD]] = !{i32 1}
7575
; CHECK-LLVM: ![[FUSE]] = !{i32 3, i32 1}
7676
; CHECK-LLVM: ![[II]] = !{i32 10}
7777
; CHECK-LLVM: ![[MAXCON]] = !{i32 12}
78+
; CHECK-LLVM: ![[ONEMD2]] = !{i32 0}
7879
; CHECK-LLVM: ![[MAXWG]] = !{i32 1, i32 1, i32 1}
7980
; CHECK-LLVM: ![[NUMSIMD]] = !{i32 8}
8081
; CHECK-LLVM: ![[MAXMHZ]] = !{i32 1000}
81-
; CHECK-LLVM: ![[ONEMD2]] = !{i32 0}
8282

8383
; ModuleID = 'kernel-attrs.cpp'
8484
source_filename = "kernel-attrs.cpp"
@@ -91,7 +91,7 @@ target triple = "spir64-unknown-linux"
9191
$_ZN3FooclEv = comdat any
9292

9393
; Function Attrs: nounwind
94-
define spir_kernel void @_ZTSZ3barvE11kernel_name() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 !num_simd_work_items !5 !max_work_group_size !6 !max_global_work_dim !7 !no_global_work_offset !4 !stall_enable !7 !scheduler_target_fmax_mhz !12 !loop_fuse !13 !initiation_interval !14 !max_concurrency !15 !disable_loop_pipelining !7 {
94+
define spir_kernel void @_ZTSZ3barvE11kernel_name() #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !4 !kernel_arg_type !4 !kernel_arg_base_type !4 !kernel_arg_type_qual !4 !num_simd_work_items !5 !max_work_group_size !6 !max_global_work_dim !7 !no_global_work_offset !4 !stall_enable !7 !scheduler_target_fmax_mhz !12 !loop_fuse !13 !initiation_interval !14 !max_concurrency !15 !pipeline_kernel !16 {
9595
entry:
9696
%Foo = alloca %class._ZTS3Foo.Foo, align 1
9797
call void @llvm.lifetime.start.p0(i64 1, ptr %Foo) #4
@@ -135,7 +135,7 @@ entry:
135135
}
136136

137137
; Function Attrs: nounwind
138-
define spir_kernel void @_ZTSZ3barvE11kernel_name3() #0 !disable_loop_pipelining !16 {
138+
define spir_kernel void @_ZTSZ3barvE11kernel_name3() #0 !pipeline_kernel !7 {
139139
entry:
140140
%Foo = alloca %class._ZTS3Foo.Foo, align 1
141141
call void @llvm.lifetime.start.p0(i64 1, ptr %Foo) #4

‎llvm-spirv/test/extensions/INTEL/SPV_INTEL_kernel_attributes/spirv_fpga_function_decorations.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,9 +37,9 @@ entry:
3737
!10 = !{i32 5919, i32 1}
3838
!11 = !{i32 5917, i32 2}
3939

40-
; CHECK-SPV-IR: define spir_kernel void @k(float %a, float %b, float %c) {{.*}} !initiation_interval ![[II:[0-9]+]] !disable_loop_pipelining ![[DISABLE_LOOP_PIPELINING:[0-9]+]] {
40+
; CHECK-SPV-IR: define spir_kernel void @k(float %a, float %b, float %c) {{.*}} !initiation_interval ![[II:[0-9]+]] !pipeline_kernel ![[PIPELINE_KERNEL:[0-9]+]] {
4141
; CHECK-SPV-IR-DAG: ![[II]] = !{i32 2}
42-
; CHECK-SPV-IR-DAG: ![[DISABLE_LOOP_PIPELINING]] = !{i32 0}
42+
; CHECK-SPV-IR-DAG: ![[PIPELINE_KERNEL]] = !{i32 1}
4343

4444
; CHECK-LLVM-NOT: define spir_kernel void @k(float %a, float %b, float %c) {{.*}} !spirv.Decorations ![[DecoListId:[0-9]+]] {
4545
; CHECK-LLVM: define spir_kernel void @k(float %a, float %b, float %c) {{.*}} {

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