[Driver][SYCL] Improve FPGA archive device unbundling with AOCO

maksimsab · mdtoguchi · maksimsab · commit 9aa6c0f80a2a · 2023-05-24T08:44:11.000-07:00
AOCO specific objects can be added to an archive.  When this occurs,
the archive was being completely ignored, causing issues with device
compilation.  Take advantage of the additional -excluded-targets option
from the clang-offload-bundler so we can process these archives for
the needed device information, excluding potential unbundling of the
target device in the presense of aoco binaries in that same object.

Co-authored-by: Michael Toguchi &lt;michael.d.toguchi@intel.com&gt;
diff --git a/clang/include/clang/Driver/OffloadBundler.h b/clang/include/clang/Driver/OffloadBundler.h
@@ -17,6 +17,7 @@
 #ifndef LLVM_CLANG_DRIVER_OFFLOADBUNDLER_H
 #define LLVM_CLANG_DRIVER_OFFLOADBUNDLER_H
 
+#include "llvm/ADT/StringRef.h"
 #include "llvm/Support/Error.h"
 #include "llvm/TargetParser/Triple.h"
 #include <string>
@@ -43,6 +44,9 @@ class OffloadBundlerConfig {
   std::vector<std::string> TargetNames;
   std::vector<std::string> InputFileNames;
   std::vector<std::string> OutputFileNames;
+
+  // List of excluded target names from unbundling.
+  std::vector<std::string> ExcludedTargetNames;
 };
 
 class OffloadBundler {
@@ -60,6 +64,9 @@ class OffloadBundler {
   llvm::Error BundleFiles();
   llvm::Error UnbundleFiles();
   llvm::Error UnbundleArchive();
+
+private:
+  bool CheckTripleIsExcluded(llvm::StringRef Triple);
 };
 
 /// Obtain the offload kind, real machine triple, and an optional GPUArch
diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp
@@ -6747,11 +6747,6 @@ class OffloadingActionBuilder final {
         // not needed for emulation, as these are treated as regular archives.
         if (!C.getDriver().isFPGAEmulationMode())
           unbundleStaticLib(types::TY_FPGA_AOCO, LA);
-        // Do not unbundle any AOCO archive as a regular archive when we are
-        // in FPGA Hardware/Simulation mode.
-        if (!C.getDriver().isFPGAEmulationMode() &&
-            hasFPGABinary(C, LA.str(), types::TY_FPGA_AOCO))
-          continue;
         unbundleStaticLib(types::TY_Archive, LA);
       }
     }
diff --git a/clang/lib/Driver/OffloadBundler.cpp b/clang/lib/Driver/OffloadBundler.cpp
@@ -71,6 +71,8 @@ using namespace clang;
 /// Section name which holds target symbol names.
 #define SYMBOLS_SECTION_NAME ".tgtsym"
 
+#define DEBUG_TYPE "clang-offload-bundler"
+
 OffloadTargetInfo::OffloadTargetInfo(const StringRef Target,
                                      const OffloadBundlerConfig &BC)
     : BundlerConfig(BC) {
@@ -1365,6 +1367,20 @@ Error OffloadBundler::BundleFiles() {
   return Error::success();
 }
 
+bool OffloadBundler::CheckTripleIsExcluded(StringRef Triple) {
+  // NOTE: "-sycldevice" Triple component has been deprecated.
+  // However, it still can be met in libraries that have been compiled before
+  // deprecation. For example, here Triple might be the following:
+  //  sycl-fpga_aoco-intel-unknown-sycldevice
+  //
+  // The workaround is to strip this Triple component if it is present.
+  Triple.consume_back("-sycldevice");
+  const auto &ExcludedTargetNames = BundlerConfig.ExcludedTargetNames;
+  auto it =
+      std::find(ExcludedTargetNames.begin(), ExcludedTargetNames.end(), Triple);
+  return it != ExcludedTargetNames.end();
+}
+
 // Unbundle the files. Return true if an error was found.
 Error OffloadBundler::UnbundleFiles() {
   // Open Input file.
@@ -1414,6 +1430,11 @@ Error OffloadBundler::UnbundleFiles() {
 
     StringRef CurTriple = **CurTripleOrErr;
     assert(!CurTriple.empty());
+    if (CheckTripleIsExcluded(CurTriple)) {
+      LLVM_DEBUG(outs() << "Triple: \"" << CurTriple.str()
+                        << "\" has been skipped by -excluded-targets list\n");
+      continue;
+    }
 
     auto Output = Worklist.begin();
     for (auto E = Worklist.end(); Output != E; Output++) {
diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -9088,15 +9088,37 @@ void OffloadBundler::ConstructJobMultipleOutputs(
     TypeArg = "o";
 
   bool HasSPIRTarget = false;
+  bool HasFPGATarget = false;
   auto SYCLTCRange = C.getOffloadToolChains<Action::OFK_SYCL>();
-  for (auto TI = SYCLTCRange.first, TE = SYCLTCRange.second; TI != TE; ++TI)
-    HasSPIRTarget |= TI->second->getTriple().isSPIR();
+  for (auto TI = SYCLTCRange.first, TE = SYCLTCRange.second; TI != TE; ++TI) {
+    llvm::Triple TT(TI->second->getTriple());
+    if (TT.isSPIR()) {
+      HasSPIRTarget = true;
+      if (TT.getSubArch() == llvm::Triple::SPIRSubArch_fpga)
+        HasFPGATarget = true;
+    }
+  }
   if (InputType == types::TY_Archive && HasSPIRTarget)
     TypeArg = "aoo";
 
   // Get the type.
   CmdArgs.push_back(TCArgs.MakeArgString(Twine("-type=") + TypeArg));
 
+  // For FPGA Archives that contain AOCO in them, we only want to unbundle
+  // the objects from the archive that do not have AOCO associated in that
+  // specific object.  Only do this when in hardware mode.
+  if (InputType == types::TY_Archive && HasFPGATarget && !IsFPGADepUnbundle &&
+      !IsFPGADepLibUnbundle && !C.getDriver().isFPGAEmulationMode()) {
+    llvm::Triple TT;
+    TT.setArchName(types::getTypeName(types::TY_FPGA_AOCO));
+    TT.setVendorName("intel");
+    TT.setOS(getToolChain().getTriple().getOS());
+    SmallString<128> ExcludedTargets("-excluded-targets=");
+    ExcludedTargets += "sycl-";
+    ExcludedTargets += TT.normalize();
+    CmdArgs.push_back(TCArgs.MakeArgString(ExcludedTargets));
+  }
+
   // Get the targets.
   SmallString<128> Triples;
   Triples += "-targets=";
diff --git a/clang/test/Driver/sycl-intelfpga-aoco-win.cpp b/clang/test/Driver/sycl-intelfpga-aoco-win.cpp
@@ -12,10 +12,10 @@
 // RUN:  %clangxx -target x86_64-pc-windows-msvc -fsycl -fno-sycl-instrument-device-code -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco.a %s -ccc-print-phases 2>&1 \
 // RUN:  | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES-WIN %s
 // CHK-FPGA-AOCO-PHASES-WIN: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl)
-// CHK-FPGA-AOCO-PHASES-WIN: 1: input, "[[INPUTSRC:.+\.cpp]]", c++, (host-sycl)
+// CHK-FPGA-AOCO-PHASES-WIN: 1: input, "[[INPUTCPP:.+\.cpp]]", c++, (host-sycl)
 // CHK-FPGA-AOCO-PHASES-WIN: 2: append-footer, {1}, c++, (host-sycl)
 // CHK-FPGA-AOCO-PHASES-WIN: 3: preprocessor, {2}, c++-cpp-output, (host-sycl)
-// CHK-FPGA-AOCO-PHASES-WIN: 4: input, "[[INPUTSRC]]", c++, (device-sycl)
+// CHK-FPGA-AOCO-PHASES-WIN: 4: input, "[[INPUTCPP]]", c++, (device-sycl)
 // CHK-FPGA-AOCO-PHASES-WIN: 5: preprocessor, {4}, c++-cpp-output, (device-sycl)
 // CHK-FPGA-AOCO-PHASES-WIN: 6: compiler, {5}, ir, (device-sycl)
 // CHK-FPGA-AOCO-PHASES-WIN: 7: offload, "host-sycl (x86_64-pc-windows-msvc)" {3}, "device-sycl (spir64_fpga-unknown-unknown)" {6}, c++-cpp-output
@@ -25,29 +25,35 @@
 // CHK-FPGA-AOCO-PHASES-WIN: 11: linker, {0, 10}, image, (host-sycl)
 // CHK-FPGA-AOCO-PHASES-WIN: 12: linker, {0, 10}, host_dep_image, (host-sycl)
 // CHK-FPGA-AOCO-PHASES-WIN: 13: clang-offload-deps, {12}, ir, (host-sycl)
-// CHK-FPGA-AOCO-PHASES-WIN: 14: linker, {6, 13}, ir, (device-sycl)
-// CHK-FPGA-AOCO-PHASES-WIN: 15: sycl-post-link, {14}, tempfiletable, (device-sycl)
-// CHK-FPGA-AOCO-PHASES-WIN: 16: file-table-tform, {15}, tempfilelist, (device-sycl)
-// CHK-FPGA-AOCO-PHASES-WIN: 17: llvm-spirv, {16}, tempfilelist, (device-sycl)
-// CHK-FPGA-AOCO-PHASES-WIN: 18: input, "[[INPUTA]]", archive
-// CHK-FPGA-AOCO-PHASES-WIN: 19: clang-offload-unbundler, {18}, fpga_dep_list
-// CHK-FPGA-AOCO-PHASES-WIN: 20: input, "[[INPUTA]]", fpga_aoco
-// CHK-FPGA-AOCO-PHASES-WIN: 21: clang-offload-unbundler, {20}, fpga_aoco
-// CHK-FPGA-AOCO-PHASES-WIN: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl)
-// CHK-FPGA-AOCO-PHASES-WIN: 23: file-table-tform, {15, 22}, tempfiletable, (device-sycl)
-// CHK-FPGA-AOCO-PHASES-WIN: 24: clang-offload-wrapper, {23}, object, (device-sycl)
-// CHK-FPGA-AOCO-PHASES-WIN: 25: offload, "host-sycl (x86_64-pc-windows-msvc)" {11}, "device-sycl (spir64_fpga-unknown-unknown)" {24}, image
+// CHK-FPGA-AOCO-PHASES-WIN: 14: input, "[[INPUTA]]", archive
+// CHK-FPGA-AOCO-PHASES-WIN: 15: clang-offload-unbundler, {14}, tempfilelist
+// CHK-FPGA-AOCO-PHASES-WIN: 16: spirv-to-ir-wrapper, {15}, tempfilelist, (device-sycl)
+// CHK-FPGA-AOCO-PHASES-WIN: 17: linker, {6, 13, 16}, ir, (device-sycl)
+// CHK-FPGA-AOCO-PHASES-WIN: 18: sycl-post-link, {17}, tempfiletable, (device-sycl)
+// CHK-FPGA-AOCO-PHASES-WIN: 19: file-table-tform, {18}, tempfilelist, (device-sycl)
+// CHK-FPGA-AOCO-PHASES-WIN: 20: llvm-spirv, {19}, tempfilelist, (device-sycl)
+// CHK-FPGA-AOCO-PHASES-WIN: 21: input, "[[INPUTA]]", archive
+// CHK-FPGA-AOCO-PHASES-WIN: 22: clang-offload-unbundler, {21}, fpga_dep_list
+// CHK-FPGA-AOCO-PHASES-WIN: 23: input, "[[INPUTA]]", fpga_aoco
+// CHK-FPGA-AOCO-PHASES-WIN: 24: clang-offload-unbundler, {23}, fpga_aoco
+// CHK-FPGA-AOCO-PHASES-WIN: 25: backend-compiler, {20, 22, 24}, fpga_aocx, (device-sycl)
+// CHK-FPGA-AOCO-PHASES-WIN: 26: file-table-tform, {18, 25}, tempfiletable, (device-sycl)
+// CHK-FPGA-AOCO-PHASES-WIN: 27: clang-offload-wrapper, {26}, object, (device-sycl)
+// CHK-FPGA-AOCO-PHASES-WIN: 28: offload, "host-sycl (x86_64-pc-windows-msvc)" {11}, "device-sycl (spir64_fpga-unknown-unknown)" {27}, image
 
 /// aoco test, checking tools
 // RUN:  %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-instrument-device-code -fno-sycl-device-lib=all -fintelfpga %t_aoco.a -Xshardware -### %s 2>&1 \
 // RUN:  | FileCheck -check-prefix=CHK-FPGA-AOCO %s
 // RUN:  %clang_cl --target=x86_64-pc-windows-msvc -fsycl -fno-sycl-instrument-device-code -fno-sycl-device-lib=all -fintelfpga %t_aoco.a -Xshardware -### %s 2>&1 \
 // RUN:  | FileCheck -check-prefix=CHK-FPGA-AOCO %s
+// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-excluded-targets=sycl-fpga_aoco-intel-unknown" "-targets=sycl-spir64_fpga-unknown-unknown" "-input=[[INPUTLIB:.+\.a]]" "-output=[[LIBLIST:.+\.txt]]" "-unbundle"
+// CHK-FPGA-AOCO: spirv-to-ir-wrapper{{.*}} "[[LIBLIST]]" "-o" "[[LIBLIST2:.+\.txt]]"
 // CHK-FPGA-AOCO: llvm-link{{.*}} "-o" "[[LINKEDBC:.+\.bc]]"
-// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" {{.*}} "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC]]"
+// CHK-FPGA-AOCO: llvm-link{{.*}} "--only-needed" "[[LINKEDBC]]" "@[[LIBLIST2]]" "-o" "[[LINKEDBC2:.+\.bc]]"
+// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" "-device-globals" "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC2]]"
 // CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT:.+\.txt]]" "[[SPLTABLE]]"
 // CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.txt]]" {{.*}} "[[TABLEOUT]]"
-// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown" "-input=[[INPUTLIB:.+\.a]]" "-output=[[AOCOLIST:.+\.txt]]" "-unbundle"
+// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown" "-input=[[INPUTLIB]]" "-output=[[AOCOLIST:.+\.txt]]" "-unbundle"
 // CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl"
 // CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT2:.+\.table]]" "[[SPLTABLE]]" "[[AOCXOUT]]"
 // CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "-batch" "[[TABLEOUT2]]"
diff --git a/clang/test/Driver/sycl-intelfpga-aoco.cpp b/clang/test/Driver/sycl-intelfpga-aoco.cpp
@@ -29,18 +29,21 @@
 // CHK-FPGA-AOCO-PHASES: 11: linker, {0, 10}, image, (host-sycl)
 // CHK-FPGA-AOCO-PHASES: 12: linker, {0, 10}, host_dep_image, (host-sycl)
 // CHK-FPGA-AOCO-PHASES: 13: clang-offload-deps, {12}, ir, (host-sycl)
-// CHK-FPGA-AOCO-PHASES: 14: linker, {6, 13}, ir, (device-sycl)
-// CHK-FPGA-AOCO-PHASES: 15: sycl-post-link, {14}, tempfiletable, (device-sycl)
-// CHK-FPGA-AOCO-PHASES: 16: file-table-tform, {15}, tempfilelist, (device-sycl)
-// CHK-FPGA-AOCO-PHASES: 17: llvm-spirv, {16}, tempfilelist, (device-sycl)
-// CHK-FPGA-AOCO-PHASES: 18: input, "[[INPUTA]]", archive
-// CHK-FPGA-AOCO-PHASES: 19: clang-offload-unbundler, {18}, fpga_dep_list
-// CHK-FPGA-AOCO-PHASES: 20: input, "[[INPUTA]]", fpga_aoco
-// CHK-FPGA-AOCO-PHASES: 21: clang-offload-unbundler, {20}, fpga_aoco
-// CHK-FPGA-AOCO-PHASES: 22: backend-compiler, {17, 19, 21}, fpga_aocx, (device-sycl)
-// CHK-FPGA-AOCO-PHASES: 23: file-table-tform, {15, 22}, tempfiletable, (device-sycl)
-// CHK-FPGA-AOCO-PHASES: 24: clang-offload-wrapper, {23}, object, (device-sycl)
-// CHK-FPGA-AOCO-PHASES: 25: offload, "host-sycl (x86_64-unknown-linux-gnu)" {11}, "device-sycl (spir64_fpga-unknown-unknown)" {24}, image
+// CHK-FPGA-AOCO-PHASES: 14: input, "[[INPUTA]]", archive
+// CHK-FPGA-AOCO-PHASES: 15: clang-offload-unbundler, {14}, tempfilelist
+// CHK-FPGA-AOCO-PHASES: 16: spirv-to-ir-wrapper, {15}, tempfilelist, (device-sycl)
+// CHK-FPGA-AOCO-PHASES: 17: linker, {6, 13, 16}, ir, (device-sycl)
+// CHK-FPGA-AOCO-PHASES: 18: sycl-post-link, {17}, tempfiletable, (device-sycl)
+// CHK-FPGA-AOCO-PHASES: 19: file-table-tform, {18}, tempfilelist, (device-sycl)
+// CHK-FPGA-AOCO-PHASES: 20: llvm-spirv, {19}, tempfilelist, (device-sycl)
+// CHK-FPGA-AOCO-PHASES: 21: input, "[[INPUTA]]", archive
+// CHK-FPGA-AOCO-PHASES: 22: clang-offload-unbundler, {21}, fpga_dep_list
+// CHK-FPGA-AOCO-PHASES: 23: input, "[[INPUTA]]", fpga_aoco
+// CHK-FPGA-AOCO-PHASES: 24: clang-offload-unbundler, {23}, fpga_aoco
+// CHK-FPGA-AOCO-PHASES: 25: backend-compiler, {20, 22, 24}, fpga_aocx, (device-sycl)
+// CHK-FPGA-AOCO-PHASES: 26: file-table-tform, {18, 25}, tempfiletable, (device-sycl)
+// CHK-FPGA-AOCO-PHASES: 27: clang-offload-wrapper, {26}, object, (device-sycl)
+// CHK-FPGA-AOCO-PHASES: 28: offload, "host-sycl (x86_64-unknown-linux-gnu)" {11}, "device-sycl (spir64_fpga-unknown-unknown)" {27}, image
 
 /// aoco test, checking tools
 // RUN:  %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-instrument-device-code -fno-sycl-device-lib=all -fintelfpga -Xshardware -foffload-static-lib=%t_aoco.a -### %s 2>&1 \
@@ -51,11 +54,14 @@
 // RUN:  | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s
 // RUN:  %clang_cl -fsycl -fno-sycl-instrument-device-code -fno-sycl-device-lib=all -fintelfpga -Xshardware %t_aoco_cl.a -### %s 2>&1 \
 // RUN:  | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s
+// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-excluded-targets=sycl-fpga_aoco-intel-unknown" "-targets=sycl-spir64_fpga-unknown-unknown" "-input=[[INPUTLIB:.+\.a]]" "-output=[[LIBLIST:.+\.txt]]" "-unbundle"
+// CHK-FPGA-AOCO: spirv-to-ir-wrapper{{.*}} "[[LIBLIST]]" "-o" "[[LIBLIST2:.+\.txt]]"
 // CHK-FPGA-AOCO: llvm-link{{.*}} "-o" "[[LINKEDBC:.+\.bc]]"
-// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" "-device-globals" "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC]]"
+// CHK-FPGA-AOCO: llvm-link{{.*}} "--only-needed" "[[LINKEDBC]]" "@[[LIBLIST2]]" "-o" "[[LINKEDBC2:.+\.bc]]"
+// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-split-esimd"{{.*}} "-O2" "-spec-const=default" "-device-globals" "-o" "[[SPLTABLE:.+\.table]]" "[[LINKEDBC2]]"
 // CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT:.+\.txt]]" "[[SPLTABLE]]"
 // CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.txt]]" {{.*}} "[[TABLEOUT]]"
-// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown" "-input=[[INPUTLIB:.+\.a]]" "-output=[[AOCOLIST:.+\.txt]]" "-unbundle"
+// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown" "-input=[[INPUTLIB]]" "-output=[[AOCOLIST:.+\.txt]]" "-unbundle"
 // CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl"
 // CHK-FPGA-AOCO: file-table-tform{{.*}} "-o" "[[TABLEOUT2:.+\.table]]" "[[SPLTABLE]]" "[[AOCXOUT]]"
 // CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "-batch" "[[TABLEOUT2]]"
diff --git a/clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp b/clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
@@ -101,6 +101,12 @@ int main(int argc, const char **argv) {
                 cl::desc("[<offload kind>-<target triple>,...]"),
                 cl::cat(ClangOffloadBundlerCategory));
 
+  cl::list<std::string> ExcludedTargetNames(
+      "excluded-targets", cl::CommaSeparated,
+      cl::desc("[<target name>,...]. List of targets that are excluded from "
+               "unbundling."),
+      cl::cat(ClangOffloadBundlerCategory));
+
   cl::opt<std::string> FilesType(
       "type", cl::Required,
       cl::desc("Type of the files to be bundled/unbundled/checked.\n"
@@ -202,6 +208,7 @@ int main(int argc, const char **argv) {
   BundlerConfig.ObjcopyPath = "";
 
   BundlerConfig.TargetNames = TargetNames;
+  BundlerConfig.ExcludedTargetNames = ExcludedTargetNames;
   BundlerConfig.InputFileNames = InputFileNames;
   BundlerConfig.OutputFileNames = OutputFileNames;
 
@@ -369,6 +376,12 @@ int main(int argc, const char **argv) {
     }
   }
 
+  // check -excluded-targets without unbundle
+  if (!ExcludedTargetNames.empty() && !Unbundle)
+    reportError(createStringError(errc::invalid_argument,
+                                  "-excluded-targets option should be used "
+                                  "only in conjunction with -unbundle"));
+
   // Verify that the offload kinds and triples are known. We also check that we
   // have exactly one host target.
   unsigned Index = 0u;

Original file line number	Diff line number	Diff line change
`@@ -6747,11 +6747,6 @@ class OffloadingActionBuilder final {`
`6747`	`6747`	`// not needed for emulation, as these are treated as regular archives.`
`6748`	`6748`	`if (!C.getDriver().isFPGAEmulationMode())`
`6749`	`6749`	`unbundleStaticLib(types::TY_FPGA_AOCO, LA);`
`6750`		`- // Do not unbundle any AOCO archive as a regular archive when we are`
`6751`		`- // in FPGA Hardware/Simulation mode.`
`6752`		`- if (!C.getDriver().isFPGAEmulationMode() &&`
`6753`		`- hasFPGABinary(C, LA.str(), types::TY_FPGA_AOCO))`
`6754`		`- continue;`
`6755`	`6750`	`unbundleStaticLib(types::TY_Archive, LA);`
`6756`	`6751`	`}`
`6757`	`6752`	`}`