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[SYCL][Doc] Render user API classes on a dedicated page (#1578)
This does not add new meaningful documentation, only introduces a new module for some public host-side APIs. Also: - Rename sycl/doc/contents.rst to sycl/doc/index.rst to generate index.html for final website. - Link documentation from the README.md Signed-off-by: Alexander Batashev <alexander.batashev@intel.com>
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README.md

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@@ -22,7 +22,7 @@ See [CONTRIBUTING.md](CONTRIBUTING.md) for details.
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## Sub-projects Documentation
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* oneAPI Data Parallel C++ compiler - See
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[GetStartedGuide.md](sycl/doc/GetStartedGuide.md)
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[DPC++ Documentation](https://intel.github.io/llvm-docs/)
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## DPC++ extensions
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sycl/doc/conf.py

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# -- General configuration ---------------------------------------------------
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master_doc = 'contents'
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master_doc = 'index'
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# Add any Sphinx extension module names here, as strings. They can be
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# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom

sycl/doc/doxygen.cfg.in

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@@ -32,7 +32,7 @@ DOXYFILE_ENCODING = UTF-8
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# title of most generated pages and in a few other places.
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# The default value is: My Project.
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PROJECT_NAME = "SYCL Runtime"
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PROJECT_NAME = "DPC++ Runtime"
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# The PROJECT_NUMBER tag can be used to enter a project or revision number. This
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# could be handy for archiving the generated documentation or if some version
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# for a project that appears at the top of each page and should give viewer a
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# quick idea about the purpose of the project. Keep the description short.
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PROJECT_BRIEF = "Runtime libraries for SYCL"
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PROJECT_BRIEF = "Runtime libraries for oneAPI Data Parallel C++"
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# With the PROJECT_LOGO tag one can specify a logo or an icon that is included
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# in the documentation. The maximum height of the logo should not exceed 55
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# normally produced when WARNINGS is set to YES.
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# The default value is: NO.
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EXTRACT_ALL = NO
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EXTRACT_ALL = YES
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# If the EXTRACT_PRIVATE tag is set to YES, all private members of a class will
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# be included in the documentation.
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# that contain example code fragments that are included (see the \include
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# command).
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EXAMPLE_PATH =
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EXAMPLE_PATH = @abs_srcdir@/../examples/
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# If the value of the EXAMPLE_PATH tag contains directories, you can use the
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# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and
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# The default value is: NO.
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# This tag requires that the tag GENERATE_HTML is set to YES.
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DISABLE_INDEX = NO
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DISABLE_INDEX = YES
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# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
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# structure should be generated to display hierarchical information. If the tag
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# The default value is: NO.
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# This tag requires that the tag GENERATE_HTML is set to YES.
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GENERATE_TREEVIEW = NO
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GENERATE_TREEVIEW = YES
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# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
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# doxygen will group on one line in the generated HTML documentation.
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# recursively expanded use the := operator instead of the = operator.
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# This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
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PREDEFINED = "__SYCL_INLINE_NAMESPACE(X)=namespace X"
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PREDEFINED = "__SYCL_INLINE_NAMESPACE(X)=namespace X" \
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"__SYCL_EXPORT" \
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"__SYCL_EXPORT_DEPRECATED(x)="
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# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
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# tag can be used to specify a list of macro names that should be expanded. The

sycl/doc/contents.rst renamed to sycl/doc/index.rst

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cuda/contents
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Extensions <https://github.com/intel/llvm/tree/sycl/sycl/doc/extensions>
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FAQ
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User API Reference <https://intel.github.io/llvm-docs/doxygen/group__sycl__api.html>
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Developing oneAPI DPC++ Compiler
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

sycl/examples/simple-dpcpp-app.cpp

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#include <CL/sycl.hpp>
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using namespace cl::sycl;
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int main() {
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// Create a buffer of 4 ints to be used inside the kernel code.
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buffer<int, 1> Buffer(4);
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// Create a simple asynchronous exception handler.
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auto AsyncHandler = [](exception_list ExceptionList) {
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for (auto &Exception : ExceptionList) {
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std::rethrow_exception(Exception);
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}
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};
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// Create a SYCL queue.
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queue Queue(AsyncHandler);
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// Size of index space for kernel.
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range<1> NumOfWorkItems{Buffer.get_count()};
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// Submit command group(work) to queue.
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Queue.submit([&](handler &cgh) {
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// Get write only access to the buffer on a device.
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auto Accessor = Buffer.get_access<access::mode::write>(cgh);
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// Execute kernel.
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cgh.parallel_for<class FillBuffer>(NumOfWorkItems, [=](id<1> WIid) {
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// Fill buffer with indices.
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Accessor[WIid] = static_cast<int>(WIid.get(0));
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});
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});
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// Get read only access to the buffer on the host.
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// This introduces an implicit barrier which blocks execution until the
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// command group above completes.
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const auto HostAccessor = Buffer.get_access<access::mode::read>();
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// Check the results.
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bool MismatchFound = false;
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for (size_t I = 0; I < Buffer.get_count(); ++I) {
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if (HostAccessor[I] != I) {
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std::cout << "The result is incorrect for element: " << I
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<< " , expected: " << I << " , got: " << HostAccessor[I]
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<< std::endl;
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MismatchFound = true;
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}
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}
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if (!MismatchFound) {
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std::cout << "The results are correct!" << std::endl;
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}
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return MismatchFound;
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}

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