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; RUN: sycl-post-link -spec-const=rt --ir-output-only %s -S -o - \
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- ; RUN: | FileCheck %s --implicit-check-not __sycl_getCompositeSpecConstantValue
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+ ; RUN: | FileCheck %s --implicit-check-not __sycl_getCompositeSpecConstantValue --implicit-check-not __sycl_getComposite2020SpecConstantValue
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;
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; This test is intended to check that sycl-post-link tool is capable of handling
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; composite specialization constants by lowering them into a set of SPIR-V
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;
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; CHECK: %[[#POD:]] = call %struct._ZTS3POD.POD @"_Z29__spirv_SpecConstantCompositeAstruct._ZTS1A.Aclass._ZTSN2cl4sycl3vecIiLi2EEE.cl::sycl::vec"([2 x %struct._ZTS1A.A] %[[#NA]], %"class._ZTSN2cl4sycl3vecIiLi2EEE.cl::sycl::vec" %[[#B]]), !SYCL_SPEC_CONST_SYM_ID ![[#MD:]]
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; CHECK: store %struct._ZTS3POD.POD %[[#POD]]
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- ;
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- ; CHECK: ![[#MD]] = !{!"_ZTS3POD", i32 [[#ID]], i32 [[#ID + 1]], i32 [[#ID + 2]], i32 [[#ID + 3]], i32 [[#ID + 4]], i32 [[#ID + 5]]}
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target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
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target triple = "spir64-unknown-unknown-sycldevice"
@@ -36,8 +34,10 @@ target triple = "spir64-unknown-unknown-sycldevice"
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%"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" = type { %"class._ZTSN2cl4sycl6detail5arrayILi1EEE.cl::sycl::detail::array" }
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$_ZTS4Test = comdat any
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+ $_ZTS17SpecializedKernel = comdat any
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@__builtin_unique_stable_name._ZNK2cl4sycl6ONEAPI12experimental13spec_constantI3PODS4_E3getIS4_EENSt9enable_ifIXsr3std6is_podIT_EE5valueES8_E4typeEv = private unnamed_addr addrspace (1 ) constant [9 x i8 ] c "_ZTS3POD\00 " , align 1
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+ @__builtin_unique_stable_name._ZNK2cl4sycl6ONEAPI12experimental13spec_constantI13MyComposConstE3getIS4_EENSt9enable_ifIXaasr3std8is_classIT_EE5valuesr3std6is_podIS9_EE5valueES9_E4typeEv = private unnamed_addr addrspace (1 ) constant [20 x i8 ] c "_ZTS13MyComposConst\00 " , align 1
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; Function Attrs: convergent norecurse uwtable
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define weak_odr dso_local spir_kernel void @_ZTS4Test (%struct._ZTS3POD.POD addrspace (1 )* %_arg_ , %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" * byval (%"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" ) align 8 %_arg_1 , %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" * byval (%"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" ) align 8 %_arg_2 , %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" * byval (%"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" ) align 8 %_arg_3 ) local_unnamed_addr #0 comdat !kernel_arg_buffer_location !4 {
@@ -57,6 +57,34 @@ entry:
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ret void
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}
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+ ; Function Attrs: convergent norecurse
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+ define weak_odr dso_local spir_kernel void @_ZTS17SpecializedKernel (float addrspace (1 )* %_arg_ , %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" * byval (%"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" ) align 8 %_arg_1 , %"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" * byval (%"class._ZTSN2cl4sycl5rangeILi1EEE.cl::sycl::range" ) align 8 %_arg_2 , %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" * byval (%"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" ) align 8 %_arg_3 ) local_unnamed_addr #0 comdat !kernel_arg_buffer_location !4 {
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+ entry:
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+ %c.i = alloca %struct._ZTS1A.A , align 4
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+ %0 = getelementptr inbounds %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" , %"class._ZTSN2cl4sycl2idILi1EEE.cl::sycl::id" * %_arg_3 , i64 0 , i32 0 , i32 0 , i64 0
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+ %1 = addrspacecast i64* %0 to i64 addrspace (4 )*
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+ %2 = load i64 , i64 addrspace (4 )* %1 , align 8
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+ %add.ptr.i = getelementptr inbounds float , float addrspace (1 )* %_arg_ , i64 %2
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+ %c.ascast.i = addrspacecast %struct._ZTS1A.A* %c.i to %struct._ZTS1A.A addrspace (4 )*
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+ %3 = bitcast %struct._ZTS1A.A* %c.i to i8*
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+ call void @llvm.lifetime.start.p0i8 (i64 8 , i8* nonnull %3 ) #3
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+ call spir_func void @_Z40__sycl_getComposite2020SpecConstantValueI13MyComposConstET_PKcPvS4_ (%struct._ZTS1A.A addrspace (4 )* sret (%struct._ZTS1A.A ) align 4 %c.ascast.i , i8 addrspace (4 )* getelementptr inbounds ([20 x i8 ], [20 x i8 ] addrspace (4 )* addrspacecast ([20 x i8 ] addrspace (1 )* @__builtin_unique_stable_name._ZNK2cl4sycl6ONEAPI12experimental13spec_constantI13MyComposConstE3getIS4_EENSt9enable_ifIXaasr3std8is_classIT_EE5valuesr3std6is_podIS9_EE5valueES9_E4typeEv to [20 x i8 ] addrspace (4 )*), i64 0 , i64 0 ), i8 addrspace (4 )* null , i8 addrspace (4 )* null ) #4
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+ ; CHECK: %[[#N0:]] = call i32 @_Z20__spirv_SpecConstantii(i32 [[#ID + 6]], i32
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+ ; CHECK: %[[#N1:]] = call float @_Z20__spirv_SpecConstantif(i32 [[#ID + 7]], float
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+ ; CHECK: %[[#CONST:]] = call %struct._ZTS1A.A @_Z29__spirv_SpecConstantCompositeif(i32 %[[#N0]], float %[[#N1]]), !SYCL_SPEC_CONST_SYM_ID ![[#MD1:]]
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+ ; CHECK: %struct._ZTS1A.A %[[#CONST]]
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+ %a.i = getelementptr inbounds %struct._ZTS1A.A , %struct._ZTS1A.A addrspace (4 )* %c.ascast.i , i64 0 , i32 0
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+ %4 = load i32 , i32 addrspace (4 )* %a.i , align 4
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+ %conv.i = sitofp i32 %4 to float
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+ %b.i = getelementptr inbounds %struct._ZTS1A.A , %struct._ZTS1A.A addrspace (4 )* %c.ascast.i , i64 0 , i32 1
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+ %5 = load float , float addrspace (4 )* %b.i , align 4
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+ %add.i = fadd float %5 , %conv.i
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+ %ptridx.ascast.i.i = addrspacecast float addrspace (1 )* %add.ptr.i to float addrspace (4 )*
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+ store float %add.i , float addrspace (4 )* %ptridx.ascast.i.i , align 4 , !tbaa !11
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+ call void @llvm.lifetime.end.p0i8 (i64 8 , i8* nonnull %3 ) #3
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+ ret void
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+ }
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+
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; Function Attrs: argmemonly nounwind willreturn
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declare void @llvm.lifetime.start.p0i8 (i64 immarg, i8* nocapture ) #1
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@@ -69,6 +97,9 @@ declare void @llvm.memcpy.p4i8.p0i8.i64(i8 addrspace(4)* noalias nocapture write
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; Function Attrs: convergent
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declare dso_local spir_func void @_Z36__sycl_getCompositeSpecConstantValueI3PODET_PKc (%struct._ZTS3POD.POD addrspace (4 )* sret (%struct._ZTS3POD.POD ) align 8 , i8 addrspace (4 )*) local_unnamed_addr #2
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+ ; Function Attrs: convergent
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+ declare dso_local spir_func void @_Z40__sycl_getComposite2020SpecConstantValueI13MyComposConstET_PKcPvS4_ (%struct._ZTS1A.A addrspace (4 )* sret (%struct._ZTS1A.A ) align 4 , i8 addrspace (4 )*, i8 addrspace (4 )*, i8 addrspace (4 )*) local_unnamed_addr #2
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+
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attributes #0 = { convergent norecurse uwtable "disable-tail-calls" ="false" "frame-pointer" ="all" "less-precise-fpmad" ="false" "min-legal-vector-width" ="0" "no-infs-fp-math" ="false" "no-jump-tables" ="false" "no-nans-fp-math" ="false" "no-signed-zeros-fp-math" ="false" "no-trapping-math" ="true" "stack-protector-buffer-size" ="8" "sycl-module-id" ="../sycl/test/spec_const/composite.cpp" "tune-cpu" ="generic" "uniform-work-group-size" ="true" "unsafe-fp-math" ="false" "use-soft-float" ="false" }
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attributes #1 = { argmemonly nounwind willreturn }
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attributes #2 = { convergent "disable-tail-calls" ="false" "frame-pointer" ="all" "less-precise-fpmad" ="false" "no-infs-fp-math" ="false" "no-nans-fp-math" ="false" "no-signed-zeros-fp-math" ="false" "no-trapping-math" ="true" "stack-protector-buffer-size" ="8" "tune-cpu" ="generic" "unsafe-fp-math" ="false" "use-soft-float" ="false" }
@@ -80,6 +111,8 @@ attributes #4 = { convergent }
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!spirv.Source = !{!2 }
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!llvm.ident = !{!3 }
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+ ; CHECK: ![[#MD]] = !{!"_ZTS3POD", i32 [[#ID]], i32 [[#ID + 1]], i32 [[#ID + 2]], i32 [[#ID + 3]], i32 [[#ID + 4]], i32 [[#ID + 5]]}
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+ ; CHECK: ![[#MD1]] = !{!"_ZTS13MyComposConst", i32 [[#ID + 6]], i32 [[#ID + 7]]}
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!0 = !{i32 1 , !"wchar_size" , i32 4 }
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!1 = !{i32 1 , i32 2 }
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!2 = !{i32 4 , i32 100000 }
@@ -89,3 +122,6 @@ attributes #4 = { convergent }
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!6 = !{!7 , !7 , i64 0 }
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!7 = !{!"omnipotent char" , !8 , i64 0 }
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!8 = !{!"Simple C++ TBAA" }
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+ !9 = !{!"int" , !7 , i64 0 }
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+ !10 = !{!"float" , !7 , i64 0 }
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+ !11 = !{!10 , !10 , i64 0 }
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