Skip to content

Commit 696ac39

Browse files
MrSidimsMrSidims
authored
[SYCL][SPIR-V] Re-land "Promote SPV_INTEL_optimization_hints to SPV_KHR_expect_assume" (#3960)
This reverts commit 733c4fc. Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
1 parent 2713910 commit 696ac39

File tree

14 files changed

+71
-78
lines changed

14 files changed

+71
-78
lines changed

‎clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -8819,7 +8819,8 @@ void SPIRVTranslator::ConstructJob(Compilation &C, const JobAction &JA,
88198819
std::string ExtArg("-spirv-ext=-all");
88208820
std::string DefaultExtArg =
88218821
",+SPV_EXT_shader_atomic_float_add,+SPV_EXT_shader_atomic_float_min_max"
8822-
",+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls";
8822+
",+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls"
8823+
",+SPV_KHR_expect_assume";
88238824
std::string INTELExtArg =
88248825
",+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io"
88258826
",+SPV_INTEL_device_side_avc_motion_estimation"
@@ -8829,9 +8830,8 @@ void SPIRVTranslator::ConstructJob(Compilation &C, const JobAction &JA,
88298830
",+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers"
88308831
",+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes"
88318832
",+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers"
8832-
",+SPV_INTEL_optimization_hints,+SPV_INTEL_float_controls2"
8833-
",+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite"
8834-
",+SPV_INTEL_fpga_buffer_location"
8833+
",+SPV_INTEL_float_controls2,+SPV_INTEL_vector_compute"
8834+
",+SPV_INTEL_fast_composite,+SPV_INTEL_fpga_buffer_location"
88358835
",+SPV_INTEL_arbitrary_precision_fixed_point"
88368836
",+SPV_INTEL_arbitrary_precision_floating_point"
88378837
",+SPV_INTEL_arbitrary_precision_floating_point"

‎clang/test/Driver/sycl-spirv-ext.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@
2929
// CHECK-DEFAULT-SAME:,+SPV_EXT_shader_atomic_float_add
3030
// CHECK-DEFAULT-SAME:,+SPV_EXT_shader_atomic_float_min_max
3131
// CHECK-DEFAULT-SAME:,+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls
32+
// CHECK-DEFAULT-SAME:,+SPV_KHR_expect_assume
3233
// CHECK-DEFAULT-SAME:,+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io
3334
// CHECK-DEFAULT-SAME:,+SPV_INTEL_device_side_avc_motion_estimation
3435
// CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_loop_controls,+SPV_INTEL_fpga_memory_attributes
@@ -37,7 +38,7 @@
3738
// CHECK-DEFAULT-SAME:,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers
3839
// CHECK-DEFAULT-SAME:,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes
3940
// CHECK-DEFAULT-SAME:,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers
40-
// CHECK-DEFAULT-SAME:,+SPV_INTEL_optimization_hints,+SPV_INTEL_float_controls2
41+
// CHECK-DEFAULT-SAME:,+SPV_INTEL_float_controls2
4142
// CHECK-DEFAULT-SAME:,+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
4243
// CHECK-DEFAULT-SAME:,+SPV_INTEL_fpga_buffer_location
4344
// CHECK-DEFAULT-SAME:,+SPV_INTEL_arbitrary_precision_fixed_point
@@ -57,6 +58,7 @@
5758
// CHECK-FPGA-HW-SAME:,+SPV_EXT_shader_atomic_float_add
5859
// CHECK-FPGA-HW-SAME:,+SPV_EXT_shader_atomic_float_min_max
5960
// CHECK-FPGA-HW-SAME:,+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls
61+
// CHECK-FPGA-HW-SAME:,+SPV_KHR_expect_assume
6062
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io
6163
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_device_side_avc_motion_estimation
6264
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_loop_controls,+SPV_INTEL_fpga_memory_attributes
@@ -65,8 +67,8 @@
6567
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers
6668
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes
6769
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers
68-
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_optimization_hints,+SPV_INTEL_float_controls2,
69-
// CHECK-FPGA-HW-SAME:+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
70+
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_float_controls2
71+
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
7072
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_buffer_location
7173
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_arbitrary_precision_fixed_point
7274
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_arbitrary_precision_floating_point

‎llvm-spirv/include/LLVMSPIRVExtensions.inc

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ EXT(SPV_KHR_float_controls)
99
EXT(SPV_KHR_linkonce_odr)
1010
EXT(SPV_KHR_integer_dot_product)
1111
EXT(SPV_KHR_bit_instructions)
12+
EXT(SPV_KHR_expect_assume)
1213
EXT(SPV_INTEL_subgroups)
1314
EXT(SPV_INTEL_media_block_io)
1415
EXT(SPV_INTEL_device_side_avc_motion_estimation)

‎llvm-spirv/lib/SPIRV/SPIRVReader.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2239,16 +2239,16 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
22392239
return mapValue(BV, Call);
22402240
}
22412241

2242-
case internal::OpAssumeTrueINTEL: {
2242+
case OpAssumeTrueKHR: {
22432243
IRBuilder<> Builder(BB);
2244-
SPIRVAssumeTrueINTEL *BC = static_cast<SPIRVAssumeTrueINTEL *>(BV);
2244+
SPIRVAssumeTrueKHR *BC = static_cast<SPIRVAssumeTrueKHR *>(BV);
22452245
Value *Condition = transValue(BC->getCondition(), F, BB);
22462246
return mapValue(BV, Builder.CreateAssumption(Condition));
22472247
}
22482248

2249-
case internal::OpExpectINTEL: {
2249+
case OpExpectKHR: {
22502250
IRBuilder<> Builder(BB);
2251-
SPIRVExpectINTELInstBase *BC = static_cast<SPIRVExpectINTELInstBase *>(BV);
2251+
SPIRVExpectKHRInstBase *BC = static_cast<SPIRVExpectKHRInstBase *>(BV);
22522252
Type *RetTy = transType(BC->getType());
22532253
Value *Val = transValue(BC->getOperand(0), F, BB);
22542254
Value *ExpVal = transValue(BC->getOperand(1), F, BB);

‎llvm-spirv/lib/SPIRV/SPIRVWriter.cpp

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2733,12 +2733,11 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
27332733
switch (II->getIntrinsicID()) {
27342734
case Intrinsic::assume: {
27352735
// llvm.assume translation is currently supported only within
2736-
// SPV_INTEL_optimization_hints extension, ignore it otherwise, since it's
2736+
// SPV_KHR_expect_assume extension, ignore it otherwise, since it's
27372737
// an optimization hint
2738-
if (BM->isAllowedToUseExtension(
2739-
ExtensionID::SPV_INTEL_optimization_hints)) {
2738+
if (BM->isAllowedToUseExtension(ExtensionID::SPV_KHR_expect_assume)) {
27402739
SPIRVValue *Condition = transValue(II->getArgOperand(0), BB);
2741-
return BM->addAssumeTrueINTELInst(Condition, BB);
2740+
return BM->addAssumeTrueKHRInst(Condition, BB);
27422741
}
27432742
return nullptr;
27442743
}
@@ -2849,14 +2848,13 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
28492848
}
28502849
case Intrinsic::expect: {
28512850
// llvm.expect translation is currently supported only within
2852-
// SPV_INTEL_optimization_hints extension, replace it with a translated
2853-
// value of #0 operand otherwise, since it's an optimization hint
2851+
// SPV_KHR_expect_assume extension, replace it with a translated value of #0
2852+
// operand otherwise, since it's an optimization hint
28542853
SPIRVValue *Value = transValue(II->getArgOperand(0), BB);
2855-
if (BM->isAllowedToUseExtension(
2856-
ExtensionID::SPV_INTEL_optimization_hints)) {
2854+
if (BM->isAllowedToUseExtension(ExtensionID::SPV_KHR_expect_assume)) {
28572855
SPIRVType *Ty = transType(II->getType());
28582856
SPIRVValue *ExpectedValue = transValue(II->getArgOperand(1), BB);
2859-
return BM->addExpectINTELInst(Ty, Value, ExpectedValue, BB);
2857+
return BM->addExpectKHRInst(Ty, Value, ExpectedValue, BB);
28602858
}
28612859
return Value;
28622860
}

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVInstruction.h

Lines changed: 12 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2762,30 +2762,30 @@ _SPIRV_OP(GenericPtrMemSemantics, true, 4, false)
27622762
_SPIRV_OP(GenericCastToPtrExplicit, true, 5, false, 1)
27632763
#undef _SPIRV_OP
27642764

2765-
class SPIRVAssumeTrueINTEL : public SPIRVInstruction {
2765+
class SPIRVAssumeTrueKHR : public SPIRVInstruction {
27662766
public:
2767-
static const Op OC = internal::OpAssumeTrueINTEL;
2767+
static const Op OC = OpAssumeTrueKHR;
27682768
static const SPIRVWord FixedWordCount = 2;
27692769

2770-
SPIRVAssumeTrueINTEL(SPIRVId TheCondition, SPIRVBasicBlock *BB)
2770+
SPIRVAssumeTrueKHR(SPIRVId TheCondition, SPIRVBasicBlock *BB)
27712771
: SPIRVInstruction(FixedWordCount, OC, BB), ConditionId(TheCondition) {
27722772
validate();
27732773
setHasNoId();
27742774
setHasNoType();
27752775
assert(BB && "Invalid BB");
27762776
}
27772777

2778-
SPIRVAssumeTrueINTEL() : SPIRVInstruction(OC), ConditionId(SPIRVID_MAX) {
2778+
SPIRVAssumeTrueKHR() : SPIRVInstruction(OC), ConditionId(SPIRVID_MAX) {
27792779
setHasNoId();
27802780
setHasNoType();
27812781
}
27822782

27832783
SPIRVCapVec getRequiredCapability() const override {
2784-
return getVec(internal::CapabilityOptimizationHintsINTEL);
2784+
return getVec(CapabilityExpectAssumeKHR);
27852785
}
27862786

27872787
llvm::Optional<ExtensionID> getRequiredExtension() const override {
2788-
return ExtensionID::SPV_INTEL_optimization_hints;
2788+
return ExtensionID::SPV_KHR_expect_assume;
27892789
}
27902790

27912791
SPIRVValue *getCondition() const { return getValue(ConditionId); }
@@ -2799,22 +2799,21 @@ class SPIRVAssumeTrueINTEL : public SPIRVInstruction {
27992799
SPIRVId ConditionId;
28002800
};
28012801

2802-
class SPIRVExpectINTELInstBase : public SPIRVInstTemplateBase {
2802+
class SPIRVExpectKHRInstBase : public SPIRVInstTemplateBase {
28032803
protected:
28042804
SPIRVCapVec getRequiredCapability() const override {
2805-
return getVec(internal::CapabilityOptimizationHintsINTEL);
2805+
return getVec(CapabilityExpectAssumeKHR);
28062806
}
28072807

28082808
llvm::Optional<ExtensionID> getRequiredExtension() const override {
2809-
return ExtensionID::SPV_INTEL_optimization_hints;
2809+
return ExtensionID::SPV_KHR_expect_assume;
28102810
}
28112811
};
28122812

2813-
#define _SPIRV_OP_INTERNAL(x, ...) \
2814-
typedef SPIRVInstTemplate<SPIRVExpectINTELInstBase, internal::Op##x, \
2815-
__VA_ARGS__> \
2813+
#define _SPIRV_OP(x, ...) \
2814+
typedef SPIRVInstTemplate<SPIRVExpectKHRInstBase, Op##x, __VA_ARGS__> \
28162815
SPIRV##x;
2817-
_SPIRV_OP_INTERNAL(ExpectINTEL, true, 5)
2816+
_SPIRV_OP(ExpectKHR, true, 5)
28182817
#undef _SPIRV_OP_INTERNAL
28192818

28202819
class SPIRVDotKHRBase : public SPIRVInstTemplateBase {

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.cpp

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -444,11 +444,6 @@ class SPIRVModuleImpl : public SPIRVModule {
444444
SPIRVBasicBlock *) override;
445445
SPIRVInstruction *addSampledImageInst(SPIRVType *, SPIRVValue *, SPIRVValue *,
446446
SPIRVBasicBlock *) override;
447-
SPIRVInstruction *addAssumeTrueINTELInst(SPIRVValue *Condition,
448-
SPIRVBasicBlock *BB) override;
449-
SPIRVInstruction *addExpectINTELInst(SPIRVType *ResultTy, SPIRVValue *Value,
450-
SPIRVValue *ExpectedValue,
451-
SPIRVBasicBlock *BB) override;
452447
template <typename AliasingInstType>
453448
SPIRVEntry *getOrAddMemAliasingINTELInst(std::vector<SPIRVId> Args,
454449
llvm::MDNode *MD);
@@ -458,6 +453,11 @@ class SPIRVModuleImpl : public SPIRVModule {
458453
llvm::MDNode *MD) override;
459454
SPIRVEntry *getOrAddAliasScopeListDeclINTELInst(std::vector<SPIRVId> Args,
460455
llvm::MDNode *MD) override;
456+
SPIRVInstruction *addAssumeTrueKHRInst(SPIRVValue *Condition,
457+
SPIRVBasicBlock *BB) override;
458+
SPIRVInstruction *addExpectKHRInst(SPIRVType *ResultTy, SPIRVValue *Value,
459+
SPIRVValue *ExpectedValue,
460+
SPIRVBasicBlock *BB) override;
461461

462462
virtual SPIRVId getExtInstSetId(SPIRVExtInstSetKind Kind) const override;
463463

@@ -1607,17 +1607,17 @@ SPIRVInstruction *SPIRVModuleImpl::addSampledImageInst(SPIRVType *ResultTy,
16071607
BB);
16081608
}
16091609

1610-
SPIRVInstruction *SPIRVModuleImpl::addAssumeTrueINTELInst(SPIRVValue *Condition,
1611-
SPIRVBasicBlock *BB) {
1612-
return addInstruction(new SPIRVAssumeTrueINTEL(Condition->getId(), BB), BB);
1610+
SPIRVInstruction *SPIRVModuleImpl::addAssumeTrueKHRInst(SPIRVValue *Condition,
1611+
SPIRVBasicBlock *BB) {
1612+
return addInstruction(new SPIRVAssumeTrueKHR(Condition->getId(), BB), BB);
16131613
}
16141614

1615-
SPIRVInstruction *SPIRVModuleImpl::addExpectINTELInst(SPIRVType *ResultTy,
1616-
SPIRVValue *Value,
1617-
SPIRVValue *ExpectedValue,
1618-
SPIRVBasicBlock *BB) {
1615+
SPIRVInstruction *SPIRVModuleImpl::addExpectKHRInst(SPIRVType *ResultTy,
1616+
SPIRVValue *Value,
1617+
SPIRVValue *ExpectedValue,
1618+
SPIRVBasicBlock *BB) {
16191619
return addInstruction(SPIRVInstTemplateBase::create(
1620-
internal::OpExpectINTEL, ResultTy, getId(),
1620+
OpExpectKHR, ResultTy, getId(),
16211621
getVec(Value->getId(), ExpectedValue->getId()), BB,
16221622
this),
16231623
BB);

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -454,18 +454,18 @@ class SPIRVModule {
454454
virtual SPIRVInstruction *addSampledImageInst(SPIRVType *, SPIRVValue *,
455455
SPIRVValue *,
456456
SPIRVBasicBlock *) = 0;
457-
virtual SPIRVInstruction *addAssumeTrueINTELInst(SPIRVValue *Condition,
458-
SPIRVBasicBlock *BB) = 0;
459-
virtual SPIRVInstruction *addExpectINTELInst(SPIRVType *ResultTy,
460-
SPIRVValue *Value,
461-
SPIRVValue *ExpectedValue,
462-
SPIRVBasicBlock *BB) = 0;
463457
virtual SPIRVEntry *getOrAddAliasDomainDeclINTELInst(
464458
std::vector<SPIRVId> Args, llvm::MDNode *MD) = 0;
465459
virtual SPIRVEntry *getOrAddAliasScopeDeclINTELInst(
466460
std::vector<SPIRVId> Args, llvm::MDNode *MD) = 0;
467461
virtual SPIRVEntry *getOrAddAliasScopeListDeclINTELInst(
468462
std::vector<SPIRVId> Args, llvm::MDNode *MD) = 0;
463+
virtual SPIRVInstruction *addAssumeTrueKHRInst(SPIRVValue *Condition,
464+
SPIRVBasicBlock *BB) = 0;
465+
virtual SPIRVInstruction *addExpectKHRInst(SPIRVType *ResultTy,
466+
SPIRVValue *Value,
467+
SPIRVValue *ExpectedValue,
468+
SPIRVBasicBlock *BB) = 0;
469469

470470
virtual SPIRVId getExtInstSetId(SPIRVExtInstSetKind Kind) const = 0;
471471

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -526,7 +526,7 @@ template <> inline void SPIRVMap<Capability, std::string>::init() {
526526
add(CapabilityAtomicFloat16MinMaxEXT, "AtomicFloat16MinMaxEXT");
527527
add(CapabilityVectorComputeINTEL, "VectorComputeINTEL");
528528
add(CapabilityVectorAnyINTEL, "VectorAnyINTEL");
529-
add(internal::CapabilityOptimizationHintsINTEL, "OptimizationHintsINTEL");
529+
add(CapabilityExpectAssumeKHR, "ExpectAssumeKHR");
530530
add(CapabilitySubgroupAvcMotionEstimationINTEL,
531531
"SubgroupAvcMotionEstimationINTEL");
532532
add(CapabilitySubgroupAvcMotionEstimationIntraINTEL,

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVOpCodeEnum.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -351,6 +351,8 @@ _SPIRV_OP(AsmINTEL, 5610)
351351
_SPIRV_OP(AsmCallINTEL, 5611)
352352
_SPIRV_OP(AtomicFMinEXT, 5614)
353353
_SPIRV_OP(AtomicFMaxEXT, 5615)
354+
_SPIRV_OP(AssumeTrueKHR, 5630)
355+
_SPIRV_OP(ExpectKHR, 5631)
354356
_SPIRV_OP(VmeImageINTEL, 5699)
355357
_SPIRV_OP(TypeVmeImageINTEL, 5700)
356358
_SPIRV_OP(TypeAvcImePayloadINTEL, 5701)

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVOpCodeEnumInternal.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,5 @@
11
#include "spirv_internal.hpp"
22

3-
_SPIRV_OP_INTERNAL(AssumeTrueINTEL, internal::OpAssumeTrueINTEL)
4-
_SPIRV_OP_INTERNAL(ExpectINTEL, internal::OpExpectINTEL)
53
_SPIRV_OP_INTERNAL(Forward, internal::OpForward)
64
_SPIRV_OP_INTERNAL(AliasDomainDeclINTEL, internal::OpAliasDomainDeclINTEL)
75
_SPIRV_OP_INTERNAL(AliasScopeDeclINTEL, internal::OpAliasScopeDeclINTEL)

‎llvm-spirv/lib/SPIRV/libSPIRV/spirv_internal.hpp

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -35,8 +35,6 @@ enum InternalLinkageType {
3535
};
3636

3737
enum InternalOp {
38-
IOpAssumeTrueINTEL = 5630,
39-
IOpExpectINTEL = 5631,
4038
IOpAliasDomainDeclINTEL = 5911,
4139
IOpAliasScopeDeclINTEL = 5912,
4240
IOpAliasScopeListDeclINTEL = 5913,
@@ -66,7 +64,6 @@ enum InternalDecoration {
6664
};
6765

6866
enum InternalCapability {
69-
ICapOptimizationHintsINTEL = 5629,
7067
ICapFPGADSPControlINTEL = 5908,
7168
ICapMemoryAccessAliasingINTEL = 5910,
7269
ICapFPGAInvocationPipeliningAttributesINTEL = 5916,
@@ -107,8 +104,6 @@ _SPIRV_OP(Op, JointMatrixMadINTEL)
107104
#undef _SPIRV_OP
108105

109106
constexpr Op OpForward = static_cast<Op>(IOpForward);
110-
constexpr Op OpAssumeTrueINTEL = static_cast<Op>(IOpAssumeTrueINTEL);
111-
constexpr Op OpExpectINTEL = static_cast<Op>(IOpExpectINTEL);
112107
constexpr Op OpAliasDomainDeclINTEL = static_cast<Op>(IOpAliasDomainDeclINTEL);
113108
constexpr Op OpAliasScopeDeclINTEL = static_cast<Op>(IOpAliasScopeDeclINTEL);
114109
constexpr Op OpAliasScopeListDeclINTEL =
@@ -137,8 +132,6 @@ constexpr Decoration DecorationFuncParamKindINTEL =
137132
constexpr Decoration DecorationFuncParamDescINTEL =
138133
static_cast<Decoration>(IDecFuncParamDescINTEL);
139134

140-
constexpr Capability CapabilityOptimizationHintsINTEL =
141-
static_cast<Capability>(ICapOptimizationHintsINTEL);
142135
constexpr Capability CapabilityFastCompositeINTEL =
143136
static_cast<Capability>(ICapFastCompositeINTEL);
144137
constexpr Capability CapabilityOptNoneINTEL =

‎llvm-spirv/test/llvm-intrinsics/assume.ll

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
; RUN: llvm-as %s -o %t.bc
2-
; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_optimization_hints -o %t.spv
2+
; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_KHR_expect_assume -o %t.spv
33
; RUN: llvm-spirv %t.spv -to-text -o %t.spt
44
; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
55
; RUN: llvm-spirv -r %t.spv -o %t.bc
@@ -12,20 +12,20 @@
1212
; RUN: llvm-spirv -r %t.spv -o %t.bc
1313
; RUN: llvm-dis < %t.bc | FileCheck %s --check-prefix=CHECK-LLVM-NO-EXT
1414

15-
; CHECK-SPIRV: Capability OptimizationHintsINTEL
16-
; CHECK-SPIRV: Extension "SPV_INTEL_optimization_hints"
15+
; CHECK-SPIRV: Capability ExpectAssumeKHR
16+
; CHECK-SPIRV: Extension "SPV_KHR_expect_assume"
1717
; CHECK-SPIRV: Name [[COMPARE:[0-9]+]] "cmp"
1818
; CHECK-SPIRV: INotEqual {{[0-9]+}} [[COMPARE]] {{[0-9]+}} {{[0-9]+}}
19-
; CHECK-SPIRV: AssumeTrueINTEL [[COMPARE]]
19+
; CHECK-SPIRV: AssumeTrueKHR [[COMPARE]]
2020

2121
; CHECK-LLVM: %cmp = icmp ne i32 %0, 0
2222
; CHECK-LLVM: call void @llvm.assume(i1 %cmp)
2323

24-
; CHECK-SPIRV-NO-EXT-NOT: Capability OptimizationHintsINTEL
25-
; CHECK-SPIRV-NO-EXT-NOT: Extension "SPV_INTEL_optimization_hints"
24+
; CHECK-SPIRV-NO-EXT-NOT: Capability ExpectAssumeKHR
25+
; CHECK-SPIRV-NO-EXT-NOT: Extension "SPV_KHR_expect_assume"
2626
; CHECK-SPIRV-NO-EXT: Name [[COMPARE:[0-9]+]] "cmp"
2727
; CHECK-SPIRV-NO-EXT: INotEqual {{[0-9]+}} [[COMPARE]] {{[0-9]+}} {{[0-9]+}}
28-
; CHECK-SPIRV-NO-EXT-NOT: AssumeTrueINTEL [[COMPARE]]
28+
; CHECK-SPIRV-NO-EXT-NOT: AssumeTrueKHR [[COMPARE]]
2929

3030
; CHECK-LLVM-NO-EXT: %cmp = icmp ne i32 %0, 0
3131
; CHECK-LLVM-NO-EXT-NOT: call void @llvm.assume(i1 %cmp)

0 commit comments

Comments
 (0)