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[SYCL][NFC] Move LowerWGScope pass to LLVM project (#1306)
LowerWGScope pass is an llvm pass that performs SYCL specific transformations in LLVM IR right after frontend. LLVM passes are supposed to be in llvm project and not in clang project. Add lit tests for SYCL specific CodeGen and LowerWGScope pass Signed-off-by: Artur Gainullin <artur.gainullin@intel.com>
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20 files changed

+149
-73
lines changed

20 files changed

+149
-73
lines changed

‎clang/lib/CodeGen/BackendUtil.cpp

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@@ -7,7 +7,6 @@
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//===----------------------------------------------------------------------===//
88

99
#include "clang/CodeGen/BackendUtil.h"
10-
#include "SYCLLowerIR/LowerWGScope.h"
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#include "clang/Basic/CodeGenOptions.h"
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#include "clang/Basic/Diagnostic.h"
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#include "clang/Basic/LangOptions.h"

‎clang/lib/CodeGen/CMakeLists.txt

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Original file line numberDiff line numberDiff line change
@@ -1,5 +1,3 @@
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add_subdirectory(SYCLLowerIR)
2-
31
set(LLVM_LINK_COMPONENTS
42
Analysis
53
BitReader
@@ -23,6 +21,7 @@ set(LLVM_LINK_COMPONENTS
2321
Remarks
2422
ScalarOpts
2523
Support
24+
SYCLLowerIR
2625
Target
2726
TransformUtils
2827
)
@@ -112,5 +111,4 @@ add_clang_library(clangCodeGen
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clangFrontend
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clangLex
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clangSerialization
115-
clangSYCLLowerIR
116114
)

‎clang/lib/CodeGen/CodeGenAction.cpp

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@@ -10,7 +10,6 @@
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#include "CodeGenModule.h"
1111
#include "CoverageMappingGen.h"
1212
#include "MacroPPCallbacks.h"
13-
#include "SYCLLowerIR/LowerWGScope.h"
1413
#include "clang/AST/ASTConsumer.h"
1514
#include "clang/AST/ASTContext.h"
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#include "clang/AST/DeclCXX.h"
@@ -39,6 +38,7 @@
3938
#include "llvm/IRReader/IRReader.h"
4039
#include "llvm/Linker/Linker.h"
4140
#include "llvm/Pass.h"
41+
#include "llvm/SYCLLowerIR/LowerWGScope.h"
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#include "llvm/Support/MemoryBuffer.h"
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#include "llvm/Support/SourceMgr.h"
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#include "llvm/Support/TimeProfiler.h"
@@ -335,7 +335,7 @@ namespace clang {
335335
if (LangOpts.SYCLIsDevice) {
336336
PrettyStackTraceString CrashInfo("Pre-linking SYCL passes");
337337
legacy::PassManager PreLinkingSyclPasses;
338-
PreLinkingSyclPasses.add(createSYCLLowerWGScopePass());
338+
PreLinkingSyclPasses.add(llvm::createSYCLLowerWGScopePass());
339339
PreLinkingSyclPasses.run(*getModule());
340340
}
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‎clang/lib/CodeGen/SYCLLowerIR/CMakeLists.txt

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This file was deleted.

‎clang/test/CodeGenSYCL/hier_par.cpp

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This file was deleted.

‎llvm/include/llvm/InitializePasses.h

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@@ -404,6 +404,7 @@ void initializeStripNonDebugSymbolsPass(PassRegistry&);
404404
void initializeStripNonLineTableDebugInfoPass(PassRegistry&);
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void initializeStripSymbolsPass(PassRegistry&);
406406
void initializeStructurizeCFGPass(PassRegistry&);
407+
void initializeSYCLLowerWGScopeLegacyPassPass(PassRegistry &);
407408
void initializeTailCallElimPass(PassRegistry&);
408409
void initializeTailDuplicatePass(PassRegistry&);
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void initializeTargetLibraryInfoWrapperPassPass(PassRegistry&);

‎llvm/include/llvm/LinkAllPasses.h

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@@ -37,6 +37,7 @@
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/IRPrintingPasses.h"
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#include "llvm/SYCLLowerIR/LowerWGScope.h"
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#include "llvm/Support/Valgrind.h"
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#include "llvm/Transforms/AggressiveInstCombine/AggressiveInstCombine.h"
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#include "llvm/Transforms/IPO.h"
@@ -199,6 +200,7 @@ namespace {
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(void) llvm::createMergeFunctionsPass();
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(void) llvm::createMergeICmpsLegacyPass();
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(void) llvm::createExpandMemCmpPass();
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(void)llvm::createSYCLLowerWGScopePass();
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std::string buf;
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llvm::raw_string_ostream os(buf);
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(void) llvm::createPrintModulePass(os);

‎clang/lib/CodeGen/SYCLLowerIR/LowerWGScope.h renamed to ‎llvm/include/llvm/SYCLLowerIR/LowerWGScope.h

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@@ -25,7 +25,6 @@ class SYCLLowerWGScopePass : public PassInfoMixin<SYCLLowerWGScopePass> {
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};
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2727
FunctionPass *createSYCLLowerWGScopePass();
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void initializeSYCLLowerWGScopeLegacyPassPass(PassRegistry &);
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} // namespace llvm
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‎llvm/lib/CMakeLists.txt

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@@ -27,6 +27,7 @@ add_subdirectory(AsmParser)
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add_subdirectory(LineEditor)
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add_subdirectory(ProfileData)
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add_subdirectory(Passes)
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add_subdirectory(SYCLLowerIR)
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add_subdirectory(TextAPI)
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add_subdirectory(ToolDrivers)
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add_subdirectory(XRay)

‎llvm/lib/LLVMBuild.txt

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@@ -42,6 +42,7 @@ subdirectories =
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Passes
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ProfileData
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Support
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SYCLLowerIR
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TableGen
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TextAPI
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Target

‎llvm/lib/SYCLLowerIR/CMakeLists.txt

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add_llvm_component_library(LLVMSYCLLowerIR
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LowerWGScope.cpp
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ADDITIONAL_HEADER_DIRS
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${LLVM_MAIN_INCLUDE_DIR}/llvm/SYCLLowerIR
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DEPENDS
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intrinsics_gen
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)

‎llvm/lib/SYCLLowerIR/LLVMBuild.txt

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;===- ./lib/SYCLLowerIR/LLVMBuild.txt -----------------------------*- Conf -*--===;
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;
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; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
; See https://llvm.org/LICENSE.txt for license information.
5+
; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
;
7+
;===------------------------------------------------------------------------===;
8+
;
9+
; This is an LLVMBuild description file for the components in this subdirectory.
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;
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; For more information on the LLVMBuild system, please see:
12+
;
13+
; http://llvm.org/docs/LLVMBuild.html
14+
;
15+
;===------------------------------------------------------------------------===;
16+
17+
[component_0]
18+
type = Group
19+
name = SYCLLowerIR
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parent = Libraries

‎clang/lib/CodeGen/SYCLLowerIR/LowerWGScope.cpp renamed to ‎llvm/lib/SYCLLowerIR/LowerWGScope.cpp

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@@ -73,10 +73,7 @@
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// et. al.
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//===----------------------------------------------------------------------===//
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76-
#include "LowerWGScope.h"
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#include "clang/Basic/AddressSpaces.h"
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#include "llvm/SYCLLowerIR/LowerWGScope.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
@@ -85,6 +82,7 @@
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
8784
#include "llvm/IR/Module.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CommandLine.h"
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‎clang/lib/CodeGen/SYCLLowerIR/README.txt renamed to ‎llvm/lib/SYCLLowerIR/README.txt

File renamed without changes.

‎llvm/test/SYCLLowerIR/byval_arg.ll

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@@ -0,0 +1,27 @@
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; RUN: opt < %s -LowerWGScope -S | FileCheck %s
2+
3+
; Check that argument of the function marked with !work_group_scope
4+
; attribute passed as byval is shared by leader work item via local
5+
; memory to all work items
6+
7+
%struct.baz = type { i64 }
8+
9+
; CHECK: @[[SHADOW:[a-zA-Z0-9]+]] = internal unnamed_addr addrspace(3) global %struct.baz undef
10+
11+
define internal spir_func void @wibble(%struct.baz* byval(%struct.baz) %arg1) !work_group_scope !0 {
12+
; CHECK-LABEL: @wibble(
13+
; CHECK-NEXT: [[TMP1:%.*]] = load i64, i64 addrspace(1)* @__spirv_BuiltInLocalInvocationIndex
14+
; CHECK-NEXT: [[CMPZ:%.*]] = icmp eq i64 [[TMP1]], 0
15+
; CHECK-NEXT: br i1 [[CMPZ]], label [[LEADER:%.*]], label [[MERGE:%.*]]
16+
; CHECK: leader:
17+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast %struct.baz* [[ARG1:%.*]] to i8*
18+
; CHECK-NEXT: call void @llvm.memcpy.p3i8.p0i8.i64(i8 addrspace(3)* align 8 bitcast (%struct.baz addrspace(3)* @[[SHADOW]] to i8 addrspace(3)*), i8* [[TMP2]], i64 8, i1 false)
19+
; CHECK-NEXT: br label [[MERGE]]
20+
; CHECK: merge:
21+
; CHECK-NEXT: call void @__spirv_ControlBarrier(i32 2, i32 2, i32 272)
22+
; CHECK-NEXT: ret void
23+
;
24+
ret void
25+
}
26+
27+
!0 = !{}

‎llvm/test/SYCLLowerIR/pfwg_and_pfwi.ll

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@@ -0,0 +1,79 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2+
; RUN: opt < %s -LowerWGScope -S | FileCheck %s
3+
4+
; Check that allocas which correspond to PFWI lambda object and a local copy of the PFWG lambda object
5+
; are properly handled by LowerWGScope pass. Check that WG-shared local "shadow" variables are created
6+
; and before each PFWI invocation leader WI stores its private copy of the variable into the shadow,
7+
; then all WIs load the shadow value into their private copies ("materialize" the private copy).
8+
9+
%struct.bar = type { i8 }
10+
%struct.zot = type { %struct.widget, %struct.widget, %struct.widget, %struct.foo }
11+
%struct.widget = type { %struct.barney }
12+
%struct.barney = type { [3 x i64] }
13+
%struct.foo = type { %struct.barney }
14+
%struct.foo.0 = type { i8 }
15+
16+
; CHECK: @[[PFWG_SHADOW:.*]] = internal unnamed_addr addrspace(3) global %struct.bar addrspace(4)*
17+
; CHECK: @[[PFWI_SHADOW:.*]] = internal unnamed_addr addrspace(3) global %struct.foo.0
18+
; CHECK: @[[GROUP_SHADOW:.*]] = internal unnamed_addr addrspace(3) global %struct.zot
19+
20+
define internal spir_func void @wibble(%struct.bar addrspace(4)* %arg, %struct.zot* byval(%struct.zot) align 8 %arg1) align 2 !work_group_scope !0 {
21+
; CHECK-LABEL: @wibble(
22+
; CHECK-NEXT: bb:
23+
; CHECK-NEXT: [[TMP0:%.*]] = load i64, i64 addrspace(1)* @__spirv_BuiltInLocalInvocationIndex
24+
; CHECK-NEXT: [[CMPZ3:%.*]] = icmp eq i64 [[TMP0]], 0
25+
; CHECK-NEXT: br i1 [[CMPZ3]], label [[LEADER:%.*]], label [[MERGE:%.*]]
26+
; CHECK: leader:
27+
; CHECK-NEXT: [[TMP1:%.*]] = bitcast %struct.zot* [[ARG1:%.*]] to i8*
28+
; CHECK-NEXT: call void @llvm.memcpy.p3i8.p0i8.i64(i8 addrspace(3)* align 16 bitcast (%struct.zot addrspace(3)* @[[GROUP_SHADOW]] to i8 addrspace(3)*), i8* align 8 [[TMP1]], i64 96, i1 false)
29+
; CHECK-NEXT: br label [[MERGE]]
30+
; CHECK: merge:
31+
; CHECK-NEXT: call void @__spirv_ControlBarrier(i32 2, i32 2, i32 272)
32+
; CHECK-NEXT: [[TMP:%.*]] = alloca [[STRUCT_BAR:%.*]] addrspace(4)*, align 8
33+
; CHECK-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_FOO_0:%.*]], align 1
34+
; CHECK-NEXT: [[ID:%.*]] = load i64, i64 addrspace(1)* @__spirv_BuiltInLocalInvocationIndex
35+
; CHECK-NEXT: [[CMPZ:%.*]] = icmp eq i64 [[ID]], 0
36+
; CHECK-NEXT: br i1 [[CMPZ]], label [[WG_LEADER:%.*]], label [[WG_CF:%.*]]
37+
; CHECK: wg_leader:
38+
; CHECK-NEXT: store [[STRUCT_BAR]] addrspace(4)* [[ARG:%.*]], [[STRUCT_BAR]] addrspace(4)** [[TMP]], align 8
39+
; CHECK-NEXT: [[TMP3:%.*]] = load [[STRUCT_BAR]] addrspace(4)*, [[STRUCT_BAR]] addrspace(4)** [[TMP]], align 8
40+
; CHECK-NEXT: [[TMP4:%.*]] = addrspacecast [[STRUCT_ZOT:%.*]] addrspace(3)* @[[GROUP_SHADOW]] to [[STRUCT_ZOT]] addrspace(4)*
41+
; CHECK-NEXT: store [[STRUCT_ZOT]] addrspace(4)* [[TMP4]], [[STRUCT_ZOT]] addrspace(4)* addrspace(3)* @wibbleWG_tmp4
42+
; CHECK-NEXT: br label [[WG_CF]]
43+
; CHECK: wg_cf:
44+
; CHECK-NEXT: [[TMP3:%.*]] = load i64, i64 addrspace(1)* @__spirv_BuiltInLocalInvocationIndex
45+
; CHECK-NEXT: [[CMPZ2:%.*]] = icmp eq i64 [[TMP3]], 0
46+
; CHECK-NEXT: br i1 [[CMPZ2]], label [[TESTMAT:%.*]], label [[LEADERMAT:%.*]]
47+
; CHECK: TestMat:
48+
; CHECK-NEXT: [[TMP4:%.*]] = bitcast %struct.foo.0* [[TMP2]] to i8*
49+
; CHECK-NEXT: call void @llvm.memcpy.p3i8.p0i8.i64(i8 addrspace(3)* align 8 getelementptr inbounds (%struct.foo.0, [[STRUCT_FOO_0]] addrspace(3)* @[[PFWI_SHADOW]], i32 0, i32 0), i8* align 1 [[TMP4]], i64 1, i1 false)
50+
; CHECK-NEXT: [[MAT_LD:%.*]] = load [[STRUCT_BAR]] addrspace(4)*, [[STRUCT_BAR]] addrspace(4)** [[TMP]]
51+
; CHECK-NEXT: store [[STRUCT_BAR]] addrspace(4)* [[MAT_LD]], [[STRUCT_BAR]] addrspace(4)* addrspace(3)* @[[PFWG_SHADOW]]
52+
; CHECK-NEXT: br label [[LEADERMAT]]
53+
; CHECK: LeaderMat:
54+
; CHECK-NEXT: call void @__spirv_ControlBarrier(i32 2, i32 2, i32 272)
55+
; CHECK-NEXT: [[MAT_LD1:%.*]] = load [[STRUCT_BAR]] addrspace(4)*, [[STRUCT_BAR]] addrspace(4)* addrspace(3)* @[[PFWG_SHADOW]]
56+
; CHECK-NEXT: store [[STRUCT_BAR]] addrspace(4)* [[MAT_LD1]], [[STRUCT_BAR]] addrspace(4)** [[TMP]]
57+
; CHECK-NEXT: [[TMP5:%.*]] = bitcast %struct.foo.0* [[TMP2]] to i8*
58+
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p3i8.i64(i8* align 1 [[TMP5]], i8 addrspace(3)* align 8 getelementptr inbounds (%struct.foo.0, [[STRUCT_FOO_0]] addrspace(3)* @[[PFWI_SHADOW]], i32 0, i32 0), i64 1, i1 false)
59+
; CHECK-NEXT: call void @__spirv_ControlBarrier(i32 2, i32 2, i32 272)
60+
; CHECK-NEXT: [[WG_VAL_TMP4:%.*]] = load [[STRUCT_ZOT]] addrspace(4)*, [[STRUCT_ZOT]] addrspace(4)* addrspace(3)* @wibbleWG_tmp4
61+
; CHECK-NEXT: call spir_func void @bar(%struct.zot addrspace(4)* [[WG_VAL_TMP4]], %struct.foo.0* byval(%struct.foo.0) align 1 [[TMP2]])
62+
; CHECK-NEXT: ret void
63+
;
64+
bb:
65+
%tmp = alloca %struct.bar addrspace(4)*, align 8
66+
%tmp2 = alloca %struct.foo.0, align 1
67+
store %struct.bar addrspace(4)* %arg, %struct.bar addrspace(4)** %tmp, align 8
68+
%tmp3 = load %struct.bar addrspace(4)*, %struct.bar addrspace(4)** %tmp, align 8
69+
%tmp4 = addrspacecast %struct.zot* %arg1 to %struct.zot addrspace(4)*
70+
call spir_func void @bar(%struct.zot addrspace(4)* %tmp4, %struct.foo.0* byval(%struct.foo.0) align 1 %tmp2)
71+
ret void
72+
}
73+
74+
define internal spir_func void @bar(%struct.zot addrspace(4)* %arg, %struct.foo.0* byval(%struct.foo.0) align 1 %arg1) align 2 !work_item_scope !0 !parallel_for_work_item !0 {
75+
bb:
76+
ret void
77+
}
78+
79+
!0 = !{}

‎llvm/tools/bugpoint/CMakeLists.txt

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@@ -16,6 +16,7 @@ set(LLVM_LINK_COMPONENTS
1616
ObjCARCOpts
1717
ScalarOpts
1818
Support
19+
SYCLLowerIR
1920
Target
2021
TransformUtils
2122
Vectorize

‎llvm/tools/opt/CMakeLists.txt

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@@ -18,6 +18,7 @@ set(LLVM_LINK_COMPONENTS
1818
Remarks
1919
ScalarOpts
2020
Support
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SYCLLowerIR
2122
Target
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TransformUtils
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Vectorize

‎llvm/tools/opt/opt.cpp

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@@ -563,6 +563,7 @@ int main(int argc, char **argv) {
563563
initializeWriteBitcodePassPass(Registry);
564564
initializeHardwareLoopsPass(Registry);
565565
initializeTypePromotionPass(Registry);
566+
initializeSYCLLowerWGScopeLegacyPassPass(Registry);
566567

567568
#ifdef BUILD_EXAMPLES
568569
initializeExampleIRTransforms(Registry);

‎sycl/test/hier_par/hier_par_wgscope.cpp

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@@ -12,7 +12,7 @@
1212
// RUN: %GPU_RUN_PLACEHOLDER %t.out
1313
// RUN: %ACC_RUN_PLACEHOLDER %t.out
1414

15-
// RUN: %clangxx -O0 -fsycl %s -o %t.out
15+
// RUN: %clangxx -O0 -fsycl -fsycl-targets=%sycl_triple %s -o %t.out
1616
// RUN: env SYCL_DEVICE_TYPE=HOST %t.out
1717
// RUN: %CPU_RUN_PLACEHOLDER %t.out
1818
// RUN: %GPU_RUN_PLACEHOLDER %t.out

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