Skip to content

Commit 317ec7a

Browse files
committed
Generalize sycl-clang-py to allow passing arbitrary cgeist args.
Signed-off-by: Tiotto, Ettore <ettore.tiotto@intel.com>
1 parent d850c76 commit 317ec7a

File tree

5 files changed

+15
-10
lines changed

5 files changed

+15
-10
lines changed

polygeist/tools/cgeist/Test/Verification/sycl/constructors.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88
//
99
//===----------------------------------------------------------------------===//
1010

11-
// RUN: sycl-clang.py %s 2> /dev/null | FileCheck %s
11+
// RUN: sycl-clang.py %s -S -function=* 2> /dev/null | FileCheck %s
1212

1313
#include <sycl/sycl.hpp>
1414

polygeist/tools/cgeist/Test/Verification/sycl/functions.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88
//
99
//===----------------------------------------------------------------------===//
1010

11-
// RUN: sycl-clang.py %s | FileCheck %s
11+
// RUN: sycl-clang.py %s -S -function=* | FileCheck %s
1212

1313
#include <sycl/sycl.hpp>
1414

@@ -48,9 +48,7 @@ SYCL_EXTERNAL void method_2(sycl::item<2, true> item) {
4848
// CHECK-NEXT: %3 = memref.cast %2 : memref<1x!sycl_id_2_> to memref<?x!sycl_id_2_>
4949
// CHECK-NEXT: affine.store %arg0, %2[0] : memref<1x!sycl_id_2_>
5050
// CHECK-NEXT: affine.store %arg1, %0[0] : memref<1x!sycl_id_2_>
51-
// CHECK-NEXT: %4 = sycl.cast(%3) : (memref<?x!sycl_id_2_>) -> memref<?x!sycl_array_2_>
52-
// CHECK-NEXT: %5 = sycl.cast(%1) : (memref<?x!sycl_id_2_>) -> memref<?x!sycl_array_2_>
53-
// CHECK-NEXT: %6 = sycl.call(%4, %5) {Function = @"operator==", Type = @array} : (memref<?x!sycl_array_2_>, memref<?x!sycl_array_2_>) -> i8
51+
// CHECK-NEXT: %4 = sycl.call(%3, %1) {Function = @"operator==", Type = @id} : (memref<?x!sycl_id_2_>, memref<?x!sycl_id_2_>) -> i8
5452
// CHECK-NEXT: return
5553
// CHECK-NEXT: }
5654

polygeist/tools/cgeist/Test/Verification/sycl/kernels.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88
//
99
//===----------------------------------------------------------------------===//
1010

11-
// RUN: sycl-clang.py %s | FileCheck %s
11+
// RUN: sycl-clang.py %s -S -function=* | FileCheck %s
1212

1313
#include <sycl/sycl.hpp>
1414

polygeist/tools/cgeist/Test/Verification/sycl/types.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88
//
99
//===----------------------------------------------------------------------===//
1010

11-
// RUN: sycl-clang.py %s | FileCheck %s
11+
// RUN: sycl-clang.py %s -S -function=* | FileCheck %s
1212

1313
#include <sycl/sycl.hpp>
1414

polygeist/tools/cgeist/sycl-clang.py.in

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -22,14 +22,21 @@ def main():
2222
mlir_tool = bin_path + "/cgeist"
2323
clang_tool = bin_path + "/clang++"
2424
arg_file = sys.argv[1]
25+
26+
# Invoke clang, capture the command line produced by clang.
2527
clang_args = [clang_tool, "-###", "-fsycl", "-fsycl-device-only", "-D__SYCL_DISABLE_PARALLEL_FOR_RANGE_ROUNDING__"]
26-
clang_args.extend(sys.argv[1:])
28+
n = len(clang_args)
29+
clang_args.extend(sys.argv[1:2])
2730
clang_res = subprocess.Popen(clang_args, stderr=subprocess.PIPE)
2831
output = clang_res.stderr.readlines()
29-
expanded_clang_args = output[5].decode("utf-8")
32+
expanded_clang_args = output[n].decode("utf-8")
3033
split_output = shlex.split(expanded_clang_args)
3134

32-
mlir_args = [mlir_tool, "-S", "--function=main", arg_file, "--args"]
35+
# Form the cgeist invocation command. Append the MLIR flags first, then append the clang flags after "--args".
36+
mlir_args = [mlir_tool]
37+
mlir_args.extend(sys.argv[2:])
38+
mlir_args.append(arg_file)
39+
mlir_args.append("--args")
3340
mlir_args.extend(split_output[1:])
3441
mlir_res = subprocess.Popen(mlir_args)
3542
mlir_res.wait()

0 commit comments

Comments
 (0)