From 20388a86b45c6f9b932626b5b6fae26163f4a5a5 Mon Sep 17 00:00:00 2001 From: Viktoria Maximova Date: Mon, 16 Oct 2023 15:50:36 +0200 Subject: [PATCH] Update decorations for global variables (#2174) This change is basically an update of #1389 for spec changes. Implementation of the feature was based on Intel extension which was not officially published to Khronos. Now it has been split, updated, and published to Khronos by KhronosGroup/SPIRV-Registry#205 Summary of the things that have changed: Capability names and a new capability was added Values for decorations have been updated to enums Decoration names and IDs have been changed Specs: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_global_variable_fpga_decorations.asciidoc https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_global_variable_host_access.asciidoc Original commit: https://github.com/KhronosGroup/SPIRV-LLVM-Translator/commit/538005a --- llvm-spirv/include/LLVMSPIRVExtensions.inc | 3 +- llvm-spirv/lib/SPIRV/SPIRVReader.cpp | 2 +- llvm-spirv/lib/SPIRV/SPIRVWriter.cpp | 44 ++++++----- .../lib/SPIRV/libSPIRV/SPIRVDecorate.cpp | 7 +- llvm-spirv/lib/SPIRV/libSPIRV/SPIRVDecorate.h | 58 +++++++++++---- llvm-spirv/lib/SPIRV/libSPIRV/SPIRVEnum.h | 12 +-- .../lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h | 32 ++++++-- llvm-spirv/lib/SPIRV/libSPIRV/SPIRVStream.cpp | 2 + llvm-spirv/lib/SPIRV/libSPIRV/SPIRVStream.h | 2 + .../lib/SPIRV/libSPIRV/spirv_internal.hpp | 9 --- .../global_var_decorations.ll | 73 ------------------- .../global_var_decorations.ll | 67 +++++++++++++++++ .../global_var_decorations.ll | 68 +++++++++++++++++ .../global_var_host_access.ll | 49 +++++++++++++ 14 files changed, 299 insertions(+), 129 deletions(-) delete mode 100644 llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_decorations/global_var_decorations.ll create mode 100644 llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_fpga_decorations/global_var_decorations.ll create mode 100644 llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_decorations.ll create mode 100644 llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_host_access.ll diff --git a/llvm-spirv/include/LLVMSPIRVExtensions.inc b/llvm-spirv/include/LLVMSPIRVExtensions.inc index e362515583217..37b65cf96cb36 100644 --- a/llvm-spirv/include/LLVMSPIRVExtensions.inc +++ b/llvm-spirv/include/LLVMSPIRVExtensions.inc @@ -55,7 +55,8 @@ EXT(SPV_INTEL_arithmetic_fence) EXT(SPV_INTEL_bfloat16_conversion) EXT(SPV_INTEL_joint_matrix) EXT(SPV_INTEL_hw_thread_queries) -EXT(SPV_INTEL_global_variable_decorations) +EXT(SPV_INTEL_global_variable_host_access) +EXT(SPV_INTEL_global_variable_fpga_decorations) EXT(SPV_INTEL_complex_float_mul_div) EXT(SPV_INTEL_split_barrier) EXT(SPV_INTEL_masked_gather_scatter) diff --git a/llvm-spirv/lib/SPIRV/SPIRVReader.cpp b/llvm-spirv/lib/SPIRV/SPIRVReader.cpp index 303fa774b33d7..bbbffb3ef574a 100644 --- a/llvm-spirv/lib/SPIRV/SPIRVReader.cpp +++ b/llvm-spirv/lib/SPIRV/SPIRVReader.cpp @@ -3849,7 +3849,7 @@ transDecorationsToMetadataList(llvm::LLVMContext *Context, OPs.push_back(LinkTypeMD); break; } - case spv::internal::DecorationHostAccessINTEL: { + case DecorationHostAccessINTEL: { const auto *const HostAccDeco = static_cast(Deco); auto *const AccModeMD = ConstantAsMetadata::get(ConstantInt::get( diff --git a/llvm-spirv/lib/SPIRV/SPIRVWriter.cpp b/llvm-spirv/lib/SPIRV/SPIRVWriter.cpp index fbff15242c6dd..b6fae6511258f 100644 --- a/llvm-spirv/lib/SPIRV/SPIRVWriter.cpp +++ b/llvm-spirv/lib/SPIRV/SPIRVWriter.cpp @@ -2662,7 +2662,8 @@ static void transMetadataDecorations(Metadata *MD, SPIRVEntry *Target) { Target, Name->getString().str(), TypeKind)); break; } - case spv::internal::DecorationHostAccessINTEL: { + + case DecorationHostAccessINTEL: { checkIsGlobalVar(Target, DecoKind); ErrLog.checkError(NumOperands == 3, SPIRVEC_InvalidLlvmModule, @@ -2673,16 +2674,20 @@ static void transMetadataDecorations(Metadata *MD, SPIRVEntry *Target) { ErrLog.checkError( AccessMode, SPIRVEC_InvalidLlvmModule, "HostAccessINTEL requires first extra operand to be an int"); + + HostAccessQualifier Q = + static_cast(AccessMode->getZExtValue()); auto *Name = dyn_cast(DecoMD->getOperand(2)); ErrLog.checkError( Name, SPIRVEC_InvalidLlvmModule, "HostAccessINTEL requires second extra operand to be a string"); - Target->addDecorate(new SPIRVDecorateHostAccessINTEL( - Target, AccessMode->getZExtValue(), Name->getString().str())); + Target->addDecorate( + new SPIRVDecorateHostAccessINTEL(Target, Q, Name->getString().str())); break; } - case spv::internal::DecorationInitModeINTEL: { + + case DecorationInitModeINTEL: { checkIsGlobalVar(Target, DecoKind); ErrLog.checkError(static_cast(Target)->getInitializer(), SPIRVEC_InvalidLlvmModule, @@ -2692,27 +2697,32 @@ static void transMetadataDecorations(Metadata *MD, SPIRVEntry *Target) { ErrLog.checkError(NumOperands == 2, SPIRVEC_InvalidLlvmModule, "InitModeINTEL requires exactly 1 extra operand"); auto *Trigger = mdconst::dyn_extract(DecoMD->getOperand(1)); - ErrLog.checkError( - Trigger, SPIRVEC_InvalidLlvmModule, - "InitModeINTEL requires extra operand to be an integer"); + ErrLog.checkError(Trigger, SPIRVEC_InvalidLlvmModule, + "InitModeINTEL requires extra operand to be an int"); + + InitializationModeQualifier Q = + static_cast(Trigger->getZExtValue()); + + Target->addDecorate(new SPIRVDecorateInitModeINTEL(Target, Q)); - Target->addDecorate( - new SPIRVDecorateInitModeINTEL(Target, Trigger->getZExtValue())); break; } - case spv::internal::DecorationImplementInCSRINTEL: { + case DecorationImplementInRegisterMapINTEL: { checkIsGlobalVar(Target, DecoKind); - ErrLog.checkError(NumOperands == 2, SPIRVEC_InvalidLlvmModule, - "ImplementInCSRINTEL requires exactly 1 extra operand"); - auto *Value = mdconst::dyn_extract(DecoMD->getOperand(1)); ErrLog.checkError( - Value, SPIRVEC_InvalidLlvmModule, - "ImplementInCSRINTEL requires extra operand to be an integer"); + NumOperands == 2, SPIRVEC_InvalidLlvmModule, + "ImplementInRegisterMapINTEL requires exactly 1 extra operand"); + auto *Value = mdconst::dyn_extract(DecoMD->getOperand(1)); + ErrLog.checkError(Value, SPIRVEC_InvalidLlvmModule, + "ImplementInRegisterMapINTEL requires extra operand to " + "be an integer"); + + Target->addDecorate(new SPIRVDecorateImplementInRegisterMapINTEL( + Target, Value->getZExtValue())); - Target->addDecorate( - new SPIRVDecorateImplementInCSRINTEL(Target, Value->getZExtValue())); break; } + case spv::internal::DecorationCacheControlLoadINTEL: { ErrLog.checkError( NumOperands == 3, SPIRVEC_InvalidLlvmModule, diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVDecorate.cpp b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVDecorate.cpp index 109e8bca3d8ae..558e3d4850597 100644 --- a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVDecorate.cpp +++ b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVDecorate.cpp @@ -127,9 +127,12 @@ void SPIRVDecorate::encode(spv_ostream &O) const { case internal::DecorationFuncParamDescINTEL: SPIRVDecorateFuncParamDescAttr::encodeLiterals(Encoder, Literals); break; - case spv::internal::DecorationHostAccessINTEL: + case DecorationHostAccessINTEL: SPIRVDecorateHostAccessINTEL::encodeLiterals(Encoder, Literals); break; + case DecorationInitModeINTEL: + SPIRVDecorateInitModeINTEL::encodeLiterals(Encoder, Literals); + break; default: Encoder << Literals; } @@ -159,7 +162,7 @@ void SPIRVDecorate::decode(std::istream &I) { case internal::DecorationFuncParamDescINTEL: SPIRVDecorateFuncParamDescAttr::decodeLiterals(Decoder, Literals); break; - case spv::internal::DecorationHostAccessINTEL: + case DecorationHostAccessINTEL: SPIRVDecorateHostAccessINTEL::decodeLiterals(Decoder, Literals); break; default: diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVDecorate.h b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVDecorate.h index 21a9729759b40..34b6980abfc6b 100644 --- a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVDecorate.h +++ b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVDecorate.h @@ -187,10 +187,12 @@ class SPIRVDecorate : public SPIRVDecorateGeneric { return ExtensionID::SPV_INTEL_fpga_invocation_pipelining_attributes; case internal::DecorationRuntimeAlignedINTEL: return ExtensionID::SPV_INTEL_runtime_aligned; - case internal::DecorationHostAccessINTEL: - case internal::DecorationInitModeINTEL: - case internal::DecorationImplementInCSRINTEL: - return ExtensionID::SPV_INTEL_global_variable_decorations; + case DecorationInitModeINTEL: + case DecorationImplementInRegisterMapINTEL: + return ExtensionID::SPV_INTEL_global_variable_fpga_decorations; + case DecorationHostAccessINTEL: + return ExtensionID::SPV_INTEL_global_variable_host_access; + case DecorationConduitKernelArgumentINTEL: case DecorationRegisterMapKernelArgumentINTEL: case DecorationStableKernelArgumentINTEL: @@ -745,9 +747,10 @@ class SPIRVDecoratePipelineEnableINTEL : public SPIRVDecorate { class SPIRVDecorateHostAccessINTEL : public SPIRVDecorate { public: // Complete constructor for SPIRVHostAccessINTEL - SPIRVDecorateHostAccessINTEL(SPIRVEntry *TheTarget, SPIRVWord AccessMode, + SPIRVDecorateHostAccessINTEL(SPIRVEntry *TheTarget, + HostAccessQualifier AccessMode, const std::string &VarName) - : SPIRVDecorate(spv::internal::DecorationHostAccessINTEL, TheTarget) { + : SPIRVDecorate(DecorationHostAccessINTEL, TheTarget) { Literals.push_back(AccessMode); for (auto &I : getVec(VarName)) Literals.push_back(I); @@ -763,7 +766,7 @@ class SPIRVDecorateHostAccessINTEL : public SPIRVDecorate { const std::vector &Literals) { #ifdef _SPIRV_SUPPORT_TEXT_FMT if (SPIRVUseTextFormat) { - Encoder << Literals.front(); + Encoder << (HostAccessQualifier)Literals.front(); std::string Name = getString(Literals.cbegin() + 1, Literals.cend()); Encoder << Name; } else @@ -775,7 +778,7 @@ class SPIRVDecorateHostAccessINTEL : public SPIRVDecorate { std::vector &Literals) { #ifdef _SPIRV_SUPPORT_TEXT_FMT if (SPIRVUseTextFormat) { - SPIRVWord Mode; + HostAccessQualifier Mode; Decoder >> Mode; std::string Name; Decoder >> Name; @@ -792,17 +795,42 @@ class SPIRVDecorateHostAccessINTEL : public SPIRVDecorate { class SPIRVDecorateInitModeINTEL : public SPIRVDecorate { public: // Complete constructor for SPIRVInitModeINTEL - SPIRVDecorateInitModeINTEL(SPIRVEntry *TheTarget, SPIRVWord Trigger) - : SPIRVDecorate(spv::internal::DecorationInitModeINTEL, TheTarget, - Trigger) {} + SPIRVDecorateInitModeINTEL(SPIRVEntry *TheTarget, + InitializationModeQualifier Trigger) + : SPIRVDecorate(DecorationInitModeINTEL, TheTarget) { + Literals.push_back(Trigger); + WordCount += Literals.size(); + } + static void encodeLiterals(SPIRVEncoder &Encoder, + const std::vector &Literals) { +#ifdef _SPIRV_SUPPORT_TEXT_FMT + if (SPIRVUseTextFormat) { + Encoder << (InitializationModeQualifier)Literals.back(); + } else +#endif + Encoder << Literals; + } + + static void decodeLiterals(SPIRVDecoder &Decoder, + std::vector &Literals) { +#ifdef _SPIRV_SUPPORT_TEXT_FMT + if (SPIRVUseTextFormat) { + InitializationModeQualifier Q; + Decoder >> Q; + Literals.back() = Q; + } else +#endif + Decoder >> Literals; + } }; -class SPIRVDecorateImplementInCSRINTEL : public SPIRVDecorate { +class SPIRVDecorateImplementInRegisterMapINTEL : public SPIRVDecorate { public: // Complete constructor for SPIRVImplementInCSRINTEL - SPIRVDecorateImplementInCSRINTEL(SPIRVEntry *TheTarget, SPIRVWord Value) - : SPIRVDecorate(spv::internal::DecorationImplementInCSRINTEL, TheTarget, - Value) {} + SPIRVDecorateImplementInRegisterMapINTEL(SPIRVEntry *TheTarget, + SPIRVWord Value) + : SPIRVDecorate(DecorationImplementInRegisterMapINTEL, TheTarget, Value) { + } }; class SPIRVDecorateCacheControlLoadINTEL : public SPIRVDecorate { diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVEnum.h b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVEnum.h index d04a3f5c2c560..77119e57f350a 100644 --- a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVEnum.h +++ b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVEnum.h @@ -476,12 +476,12 @@ template <> inline void SPIRVMap::init() { {CapabilityFPGAInvocationPipeliningAttributesINTEL}); ADD_VEC_INIT(internal::DecorationRuntimeAlignedINTEL, {CapabilityRuntimeAlignedAttributeINTEL}); - ADD_VEC_INIT(internal::DecorationHostAccessINTEL, - {internal::CapabilityGlobalVariableDecorationsINTEL}); - ADD_VEC_INIT(internal::DecorationInitModeINTEL, - {internal::CapabilityGlobalVariableDecorationsINTEL}); - ADD_VEC_INIT(internal::DecorationImplementInCSRINTEL, - {internal::CapabilityGlobalVariableDecorationsINTEL}); + ADD_VEC_INIT(DecorationHostAccessINTEL, + {CapabilityGlobalVariableHostAccessINTEL}); + ADD_VEC_INIT(DecorationInitModeINTEL, + {CapabilityGlobalVariableFPGADecorationsINTEL}); + ADD_VEC_INIT(DecorationImplementInRegisterMapINTEL, + {CapabilityGlobalVariableFPGADecorationsINTEL}); ADD_VEC_INIT(internal::DecorationArgumentAttributeINTEL, {CapabilityFunctionPointersINTEL}); ADD_VEC_INIT(internal::DecorationCacheControlLoadINTEL, diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h index 431ef6dd71c57..deaa06d41b662 100644 --- a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h +++ b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h @@ -216,14 +216,15 @@ template <> inline void SPIRVMap::init() { add(DecorationLatencyControlConstraintINTEL, "LatencyControlConstraintINTEL"); add(DecorationFPMaxErrorDecorationINTEL, "FPMaxErrorDecorationINTEL"); + add(DecorationHostAccessINTEL, "HostAccessINTEL"); + add(DecorationInitModeINTEL, "InitModeINTEL"); + add(DecorationImplementInRegisterMapINTEL, "ImplementInRegisterMapINTEL"); + // From spirv_internal.hpp add(internal::DecorationFuncParamKindINTEL, "FuncParamKindINTEL"); add(internal::DecorationFuncParamDescINTEL, "FuncParamDescINTEL"); add(internal::DecorationCallableFunctionINTEL, "CallableFunctionINTEL"); add(internal::DecorationRuntimeAlignedINTEL, "RuntimeAlignedINTEL"); - add(internal::DecorationHostAccessINTEL, "HostAccessINTEL"); - add(internal::DecorationInitModeINTEL, "InitModeINTEL"); - add(internal::DecorationImplementInCSRINTEL, "ImplementInCSRINTEL"); add(internal::DecorationArgumentAttributeINTEL, "ArgumentAttributeINTEL"); add(internal::DecorationCacheControlLoadINTEL, "CacheControlLoadINTEL"); add(internal::DecorationCacheControlStoreINTEL, "CacheControlStoreINTEL"); @@ -634,6 +635,9 @@ template <> inline void SPIRVMap::init() { add(CapabilityAtomicFloat16AddEXT, "AtomicFloat16AddEXT"); add(CapabilityDebugInfoModuleINTEL, "DebugInfoModuleINTEL"); add(CapabilitySplitBarrierINTEL, "SplitBarrierINTEL"); + add(CapabilityGlobalVariableFPGADecorationsINTEL, + "GlobalVariableFPGADecorationsINTEL"); + add(CapabilityGlobalVariableHostAccessINTEL, "GlobalVariableHostAccessINTEL"); add(CapabilityGroupUniformArithmeticKHR, "GroupUniformArithmeticKHR"); add(CapabilityFPGAArgumentInterfacesINTEL, "FPGAArgumentInterfacesINTEL"); add(CapabilityFPGADSPControlINTEL, "FPGADSPControlINTEL"); @@ -652,8 +656,6 @@ template <> inline void SPIRVMap::init() { add(internal::CapabilityBfloat16ConversionINTEL, "Bfloat16ConversionINTEL"); add(internal::CapabilityJointMatrixINTEL, "JointMatrixINTEL"); add(internal::CapabilityHWThreadQueryINTEL, "HWThreadQueryINTEL"); - add(internal::CapabilityGlobalVariableDecorationsINTEL, - "GlobalVariableDecorationsINTEL"); add(internal::CapabilityComplexFloatMulDivINTEL, "ComplexFloatMulDivINTEL"); add(internal::CapabilityMaskedGatherScatterINTEL, "MaskedGatherScatterINTEL"); add(internal::CapabilityTensorFloat32RoundingINTEL, @@ -676,6 +678,26 @@ template <> inline void SPIRVMap::init() { } SPIRV_DEF_NAMEMAP(Capability, SPIRVCapabilityNameMap) +template <> +inline void SPIRVMap::init() { + add(InitializationModeQualifierInitOnDeviceReprogramINTEL, + "InitOnDeviceReprogramINTEL"); + add(InitializationModeQualifierInitOnDeviceResetINTEL, + "InitOnDeviceResetINTEL"); + add(InitializationModeQualifierMax, "Max"); +} +SPIRV_DEF_NAMEMAP(InitializationModeQualifier, + SPIRVInitializationModeQualifierNameMap) + +template <> inline void SPIRVMap::init() { + add(HostAccessQualifierNoneINTEL, "NoneINTEL"); + add(HostAccessQualifierReadINTEL, "ReadINTEL"); + add(HostAccessQualifierWriteINTEL, "WriteINTEL"); + add(HostAccessQualifierReadWriteINTEL, "ReadWriteINTEL"); + add(HostAccessQualifierMax, "Max"); +} +SPIRV_DEF_NAMEMAP(HostAccessQualifier, SPIRVHostAccessQualifierNameMap) + } /* namespace SPIRV */ #endif // SPIRV_LIBSPIRV_SPIRVNAMEMAPENUM_H diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVStream.cpp b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVStream.cpp index 65ca5cbb61232..e4cfee3ea994c 100644 --- a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVStream.cpp +++ b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVStream.cpp @@ -145,6 +145,8 @@ SPIRV_DEF_ENCDEC(Decoration) SPIRV_DEF_ENCDEC(OCLExtOpKind) SPIRV_DEF_ENCDEC(SPIRVDebugExtOpKind) SPIRV_DEF_ENCDEC(NonSemanticAuxDataOpKind) +SPIRV_DEF_ENCDEC(InitializationModeQualifier) +SPIRV_DEF_ENCDEC(HostAccessQualifier) SPIRV_DEF_ENCDEC(LinkageType) // Read a string with padded 0's at the end so that they form a stream of diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVStream.h b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVStream.h index bac08d6e665fe..0a788044a642c 100644 --- a/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVStream.h +++ b/llvm-spirv/lib/SPIRV/libSPIRV/SPIRVStream.h @@ -229,6 +229,8 @@ SPIRV_DEC_ENCDEC(Decoration) SPIRV_DEC_ENCDEC(OCLExtOpKind) SPIRV_DEC_ENCDEC(SPIRVDebugExtOpKind) SPIRV_DEC_ENCDEC(NonSemanticAuxDataOpKind) +SPIRV_DEC_ENCDEC(InitializationModeQualifier) +SPIRV_DEC_ENCDEC(HostAccessQualifier) SPIRV_DEC_ENCDEC(LinkageType) const SPIRVEncoder &operator<<(const SPIRVEncoder &O, const std::string &Str); diff --git a/llvm-spirv/lib/SPIRV/libSPIRV/spirv_internal.hpp b/llvm-spirv/lib/SPIRV/libSPIRV/spirv_internal.hpp index df20fe7b04ce3..9325ec8810fd6 100644 --- a/llvm-spirv/lib/SPIRV/libSPIRV/spirv_internal.hpp +++ b/llvm-spirv/lib/SPIRV/libSPIRV/spirv_internal.hpp @@ -86,9 +86,6 @@ enum InternalOp { enum InternalDecoration { IDecRuntimeAlignedINTEL = 5940, IDecCallableFunctionINTEL = 6087, - IDecHostAccessINTEL = 6147, - IDecInitModeINTEL = 6148, - IDecImplementInCSRINTEL = 6149, IDecArgumentAttributeINTEL = 6409, IDecCacheControlLoadINTEL = 6442, IDecCacheControlStoreINTEL = 6443, @@ -257,12 +254,6 @@ constexpr Decoration DecorationCallableFunctionINTEL = static_cast(IDecCallableFunctionINTEL); constexpr Decoration DecorationRuntimeAlignedINTEL = static_cast(IDecRuntimeAlignedINTEL); -constexpr Decoration DecorationHostAccessINTEL = - static_cast(IDecHostAccessINTEL); -constexpr Decoration DecorationInitModeINTEL = - static_cast(IDecInitModeINTEL); -constexpr Decoration DecorationImplementInCSRINTEL = - static_cast(IDecImplementInCSRINTEL); constexpr Decoration DecorationArgumentAttributeINTEL = static_cast(IDecArgumentAttributeINTEL); constexpr Decoration DecorationFuncParamKindINTEL = diff --git a/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_decorations/global_var_decorations.ll b/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_decorations/global_var_decorations.ll deleted file mode 100644 index 993112cc2f91d..0000000000000 --- a/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_decorations/global_var_decorations.ll +++ /dev/null @@ -1,73 +0,0 @@ -; RUN: llvm-as %s -o %t.bc -; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_decorations -o %t.spv -; RUN: llvm-spirv %t.spv -to-text -o %t.spt -; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV - -; RUN: llvm-spirv -r %t.spv --spirv-target-env=SPV-IR -o %t.rev.bc -; RUN: llvm-dis %t.rev.bc -; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-SPV-IR - -; RUN: llvm-spirv -r %t.spv -o %t.rev.bc -; RUN: llvm-dis %t.rev.bc -; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM - -; Expected to fail - the decorations require enabled extension to be translated. -; RUN: not llvm-spirv %t.bc -o %t.spv - -target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" -target triple = "spir64-unknown-unknown" - -@int_var = addrspace(1) global i32 42, !spirv.Decorations !1 -@float_var = addrspace(1) global float 1.0, !spirv.Decorations !6 -@bool_var = addrspace(1) global i1 0, !spirv.Decorations !9 - -; CHECK-SPIRV: Capability GlobalVariableDecorationsINTEL -; CHECK-SPIRV: Extension "SPV_INTEL_global_variable_decorations" -; CHECK-SPIRV: Decorate [[#INT_VAR_ID:]] HostAccessINTEL 1 "IntVarName" -; CHECK-SPIRV: Decorate [[#INT_VAR_ID]] ImplementInCSRINTEL 1 -; CHECK-SPIRV: Decorate [[#INT_VAR_ID]] InitModeINTEL 0 - -; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID:]] ImplementInCSRINTEL 1 -; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID]] InitModeINTEL 1 - -; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID:]] HostAccessINTEL 3 "BoolVarName" -; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID]] ImplementInCSRINTEL 0 -; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID]] InitModeINTEL 0 - -; 5 is a global storage -; CHECK-SPIRV: Variable [[#]] [[#INT_VAR_ID]] 5 -; CHECK-SPIRV: Variable [[#]] [[#FLOAT_VAR_ID]] 5 -; CHECK-SPIRV: Variable [[#]] [[#BOOL_VAR_ID]] 5 - -!1 = !{!2, !3, !4} -!2 = !{i32 6147, i32 1, !"IntVarName"} ; HostAccessINTEL 1 "IntVarName" -!3 = !{i32 6149, i1 true} ; ImplementInCSRINTEL = true -!4 = !{i32 6148, i32 0} ; InitModeINTEL = 0 -!5 = !{i32 6148, i32 1} ; InitModeINTEL = 1 -!6 = !{!3, !5} -!7 = !{i32 6147, i32 3, !"BoolVarName"} ; HostAccessINTEL 3 "BoolVarName" -!8 = !{i32 6149, i1 false} ; ImplementInCSRINTEL = false -!9 = !{!7, !8, !4} - -; CHECK-SPV-IR: @int_var = addrspace(1) global i32 42, !spirv.Decorations ![[#INT_VAR_DEC:]] -; CHECK-SPV-IR: @float_var = addrspace(1) global float 1.000000e+00, !spirv.Decorations ![[#FLOAT_VAR_DEC:]] -; CHECK-SPV-IR: @bool_var = addrspace(1) global i1 false, !spirv.Decorations ![[#BOOL_VAR_DEC:]] - -; CHECK-SPV-IR: ![[#INT_VAR_DEC]] = !{![[#]], ![[#MD_HOST_ACCESS_INTVAR:]], ![[#MD_INIT_0:]], ![[#MD_CSR_1:]]} -; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_INTVAR]] = !{i32 6147, i32 1, !"IntVarName"} -; CHECK-SPV-IR: ![[#MD_INIT_0]] = !{i32 6148, i32 0} -; CHECK-SPV-IR: ![[#MD_CSR_1]] = !{i32 6149, i32 1} -; CHECK-SPV-IR: ![[#FLOAT_VAR_DEC]] = !{![[#]], ![[#MD_INIT_1:]], ![[#MD_CSR_1]]} -; CHECK-SPV-IR: ![[#MD_INIT_1]] = !{i32 6148, i32 1} -; CHECK-SPV-IR: ![[#BOOL_VAR_DEC]] = !{![[#]], ![[#MD_HOST_ACCESS_BOOLVAR:]], ![[#MD_INIT_0]], ![[#MD_CSR_0:]]} -; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_BOOLVAR]] = !{i32 6147, i32 3, !"BoolVarName"} -; CHECK-SPV-IR: ![[#MD_CSR_0]] = !{i32 6149, i32 0} - - -; CHECK-LLVM-NOT: @int_var = {{.*}}, !spirv.Decorations ![[#]] -; CHECK-LLVM-NOT: @float_var = {{.*}}, !spirv.Decorations ![[#]] -; CHECK-LLVM-NOT: @bool_var = {{.*}}, !spirv.Decorations ![[#]] - -; CHECK-LLVM: @int_var = addrspace(1) global i32 42 -; CHECK-LLVM: @float_var = addrspace(1) global float 1.000000e+00 -; CHECK-LLVM: @bool_var = addrspace(1) global i1 false diff --git a/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_fpga_decorations/global_var_decorations.ll b/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_fpga_decorations/global_var_decorations.ll new file mode 100644 index 0000000000000..928322aac8523 --- /dev/null +++ b/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_fpga_decorations/global_var_decorations.ll @@ -0,0 +1,67 @@ +; RUN: llvm-as %s -o %t.bc +; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_fpga_decorations -o %t.spv +; RUN: llvm-spirv %t.spv -to-text -o %t.spt +; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV + +; RUN: llvm-spirv -r %t.spv --spirv-target-env=SPV-IR -o %t.rev.bc +; RUN: llvm-dis %t.rev.bc +; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-SPV-IR + +; RUN: llvm-spirv -r %t.spv -o %t.rev.bc +; RUN: llvm-dis %t.rev.bc +; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM + +; Expected to fail - the decorations require enabled extension to be translated. +; RUN: not llvm-spirv %t.bc -o %t.spv + +target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" +target triple = "spir64-unknown-unknown" + +@int_var = addrspace(1) global i32 42, !spirv.Decorations !1 +@float_var = addrspace(1) global float 1.0, !spirv.Decorations !5 +@bool_var = addrspace(1) global i1 0, !spirv.Decorations !7 + +; CHECK-SPIRV: Capability GlobalVariableFPGADecorationsINTEL +; CHECK-SPIRV: Extension "SPV_INTEL_global_variable_fpga_decorations" +; CHECK-SPIRV: Decorate [[#INT_VAR_ID:]] ImplementInRegisterMapINTEL 1 +; CHECK-SPIRV: Decorate [[#INT_VAR_ID]] InitModeINTEL InitOnDeviceReprogramINTEL + +; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID:]] ImplementInRegisterMapINTEL 1 +; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID]] InitModeINTEL InitOnDeviceResetINTEL + +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID:]] ImplementInRegisterMapINTEL 0 +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID]] InitModeINTEL InitOnDeviceReprogramINTEL + +; 5 is a global storage +; CHECK-SPIRV: Variable [[#]] [[#INT_VAR_ID]] 5 +; CHECK-SPIRV: Variable [[#]] [[#FLOAT_VAR_ID]] 5 +; CHECK-SPIRV: Variable [[#]] [[#BOOL_VAR_ID]] 5 + +!1 = !{!2, !3} +!2 = !{i32 6148, i1 true} ; ImplementInRegisterMapINTEL = true +!3 = !{i32 6147, i32 0} ; InitModeINTEL = 0 +!4 = !{i32 6147, i32 1} ; InitModeINTEL = 1 +!5 = !{!2, !4} +!6 = !{i32 6148, i1 false} ; ImplementInRegisterMapINTEL = false +!7 = !{!6, !3} + +; CHECK-SPV-IR: @int_var = addrspace(1) global i32 42, !spirv.Decorations ![[#INT_VAR_DEC:]] +; CHECK-SPV-IR: @float_var = addrspace(1) global float 1.000000e+00, !spirv.Decorations ![[#FLOAT_VAR_DEC:]] +; CHECK-SPV-IR: @bool_var = addrspace(1) global i1 false, !spirv.Decorations ![[#BOOL_VAR_DEC:]] + +; CHECK-SPV-IR: ![[#INT_VAR_DEC]] = !{![[#]], ![[#MD_INIT_0:]], ![[#MD_CSR_1:]]} +; CHECK-SPV-IR: ![[#MD_INIT_0]] = !{i32 6147, i32 0} +; CHECK-SPV-IR: ![[#MD_CSR_1]] = !{i32 6148, i32 1} +; CHECK-SPV-IR: ![[#FLOAT_VAR_DEC]] = !{![[#]], ![[#MD_INIT_1:]], ![[#MD_CSR_1]]} +; CHECK-SPV-IR: ![[#MD_INIT_1]] = !{i32 6147, i32 1} +; CHECK-SPV-IR: ![[#BOOL_VAR_DEC]] = !{![[#]], ![[#MD_INIT_0]], ![[#MD_CSR_0:]]} +; CHECK-SPV-IR: ![[#MD_CSR_0]] = !{i32 6148, i32 0} + + +; CHECK-LLVM-NOT: @int_var = {{.*}}, !spirv.Decorations ![[#]] +; CHECK-LLVM-NOT: @float_var = {{.*}}, !spirv.Decorations ![[#]] +; CHECK-LLVM-NOT: @bool_var = {{.*}}, !spirv.Decorations ![[#]] + +; CHECK-LLVM: @int_var = addrspace(1) global i32 42 +; CHECK-LLVM: @float_var = addrspace(1) global float 1.000000e+00 +; CHECK-LLVM: @bool_var = addrspace(1) global i1 false diff --git a/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_decorations.ll b/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_decorations.ll new file mode 100644 index 0000000000000..7e0a2a241d897 --- /dev/null +++ b/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_decorations.ll @@ -0,0 +1,68 @@ +; RUN: llvm-as %s -o %t.bc +; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_fpga_decorations,+SPV_INTEL_global_variable_host_access -o %t.spv +; RUN: llvm-spirv %t.spv -to-text -o %t.spt +; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV + +; RUN: llvm-spirv -r %t.spv --spirv-target-env=SPV-IR -o %t.rev.bc +; RUN: llvm-dis %t.rev.bc +; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-SPV-IR + +; Expected to fail - the decorations require enabled extensions to be translated. +; RUN: not llvm-spirv %t.bc -o %t.spv + +; Expected to fail - the decorations require enabled extensions to be translated. +; RUN: not llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_fpga_decorations -o %t.spv + +; Expected to fail - the decorations require enabled extensions to be translated. +; RUN: not llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_host_access -o %t.spv + +target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" +target triple = "spir64-unknown-unknown" + +@int_var = addrspace(1) global i32 42, !spirv.Decorations !1 +@float_var = addrspace(1) global float 1.0, !spirv.Decorations !6 +@bool_var = addrspace(1) global i1 0, !spirv.Decorations !9 + +; CHECK-SPIRV: Capability GlobalVariableFPGADecorationsINTEL +; CHECK-SPIRV: Capability GlobalVariableHostAccessINTEL +; CHECK-SPIRV: Extension "SPV_INTEL_global_variable_fpga_decorations" +; CHECK-SPIRV: Extension "SPV_INTEL_global_variable_host_access" +; CHECK-SPIRV: Decorate [[#INT_VAR_ID:]] HostAccessINTEL ReadINTEL "IntVarName" +; CHECK-SPIRV: Decorate [[#INT_VAR_ID]] ImplementInRegisterMapINTEL 1 +; CHECK-SPIRV: Decorate [[#INT_VAR_ID]] InitModeINTEL InitOnDeviceReprogramINTEL + +; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID:]] ImplementInRegisterMapINTEL 1 +; CHECK-SPIRV: Decorate [[#FLOAT_VAR_ID]] InitModeINTEL InitOnDeviceResetINTEL + +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID:]] HostAccessINTEL ReadWriteINTEL "BoolVarName" +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID]] ImplementInRegisterMapINTEL 0 +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID]] InitModeINTEL InitOnDeviceReprogramINTEL + +; 5 is a global storage +; CHECK-SPIRV: Variable [[#]] [[#INT_VAR_ID]] 5 +; CHECK-SPIRV: Variable [[#]] [[#FLOAT_VAR_ID]] 5 +; CHECK-SPIRV: Variable [[#]] [[#BOOL_VAR_ID]] 5 + +!1 = !{!2, !3, !4} +!2 = !{i32 6168, i32 1, !"IntVarName"} ; HostAccessINTEL 1 "IntVarName" +!3 = !{i32 6148, i1 true} ; ImplementInRegisterMapINTEL = true +!4 = !{i32 6147, i32 0} ; InitModeINTEL = 0 +!5 = !{i32 6147, i32 1} ; InitModeINTEL = 1 +!6 = !{!3, !5} +!7 = !{i32 6168, i32 3, !"BoolVarName"} ; HostAccessINTEL 3 "BoolVarName" +!8 = !{i32 6148, i1 false} ; ImplementInRegisterMapINTEL = false +!9 = !{!7, !8, !4} + +; CHECK-SPV-IR: @int_var = addrspace(1) global i32 42, !spirv.Decorations ![[#INT_VAR_DEC:]] +; CHECK-SPV-IR: @float_var = addrspace(1) global float 1.000000e+00, !spirv.Decorations ![[#FLOAT_VAR_DEC:]] +; CHECK-SPV-IR: @bool_var = addrspace(1) global i1 false, !spirv.Decorations ![[#BOOL_VAR_DEC:]] + +; CHECK-SPV-IR: ![[#INT_VAR_DEC]] = !{![[#]], ![[#MD_INIT_0:]], ![[#MD_CSR_1:]], ![[#MD_HOST_ACCESS_INTVAR:]]} +; CHECK-SPV-IR: ![[#MD_INIT_0]] = !{i32 6147, i32 0} +; CHECK-SPV-IR: ![[#MD_CSR_1]] = !{i32 6148, i32 1} +; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_INTVAR]] = !{i32 6168, i32 1, !"IntVarName"} +; CHECK-SPV-IR: ![[#FLOAT_VAR_DEC]] = !{![[#]], ![[#MD_INIT_1:]], ![[#MD_CSR_1]]} +; CHECK-SPV-IR: ![[#MD_INIT_1]] = !{i32 6147, i32 1} +; CHECK-SPV-IR: ![[#BOOL_VAR_DEC]] = !{![[#]], ![[#MD_INIT_0]], ![[#MD_CSR_0:]], ![[#MD_HOST_ACCESS_BOOLVAR:]]} +; CHECK-SPV-IR: ![[#MD_CSR_0]] = !{i32 6148, i32 0} +; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_BOOLVAR]] = !{i32 6168, i32 3, !"BoolVarName"} diff --git a/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_host_access.ll b/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_host_access.ll new file mode 100644 index 0000000000000..3b9df035d4848 --- /dev/null +++ b/llvm-spirv/test/extensions/INTEL/SPV_INTEL_global_variable_host_access/global_var_host_access.ll @@ -0,0 +1,49 @@ +; RUN: llvm-as %s -o %t.bc +; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_global_variable_host_access -o %t.spv +; RUN: llvm-spirv %t.spv -to-text -o %t.spt +; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV + +; RUN: llvm-spirv -r %t.spv --spirv-target-env=SPV-IR -o %t.rev.bc +; RUN: llvm-dis %t.rev.bc +; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-SPV-IR + +; RUN: llvm-spirv -r %t.spv -o %t.rev.bc +; RUN: llvm-dis %t.rev.bc +; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM + +; Expected to fail - the decorations require enabled extension to be translated. +; RUN: not llvm-spirv %t.bc -o %t.spv + +target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" +target triple = "spir64-unknown-unknown" + +@int_var = addrspace(1) global i32 42, !spirv.Decorations !1 +@bool_var = addrspace(1) global i1 0, !spirv.Decorations !4 + +; CHECK-SPIRV: Capability GlobalVariableHostAccessINTEL +; CHECK-SPIRV: Extension "SPV_INTEL_global_variable_host_access" +; CHECK-SPIRV: Decorate [[#INT_VAR_ID:]] HostAccessINTEL ReadINTEL "IntVarName" +; CHECK-SPIRV: Decorate [[#BOOL_VAR_ID:]] HostAccessINTEL ReadWriteINTEL "BoolVarName" + +; 5 is a global storage +; CHECK-SPIRV: Variable [[#]] [[#INT_VAR_ID]] 5 +; CHECK-SPIRV: Variable [[#]] [[#BOOL_VAR_ID]] 5 + +!1 = !{!2} +!2 = !{i32 6168, i32 1, !"IntVarName"} ; HostAccessINTEL 1 "IntVarName" +!3 = !{i32 6168, i32 3, !"BoolVarName"} ; HostAccessINTEL 3 "BoolVarName" +!4 = !{!3} + +; CHECK-SPV-IR: @int_var = addrspace(1) global i32 42, !spirv.Decorations ![[#INT_VAR_DEC:]] +; CHECK-SPV-IR: @bool_var = addrspace(1) global i1 false, !spirv.Decorations ![[#BOOL_VAR_DEC:]] + +; CHECK-SPV-IR: ![[#INT_VAR_DEC]] = !{![[#]], ![[#MD_HOST_ACCESS_INTVAR:]]} +; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_INTVAR]] = !{i32 6168, i32 1, !"IntVarName"} +; CHECK-SPV-IR: ![[#BOOL_VAR_DEC]] = !{![[#]], ![[#MD_HOST_ACCESS_BOOLVAR:]]} +; CHECK-SPV-IR: ![[#MD_HOST_ACCESS_BOOLVAR]] = !{i32 6168, i32 3, !"BoolVarName"} + +; CHECK-LLVM-NOT: @int_var = {{.*}}, !spirv.Decorations ![[#]] +; CHECK-LLVM-NOT: @bool_var = {{.*}}, !spirv.Decorations ![[#]] + +; CHECK-LLVM: @int_var = addrspace(1) global i32 42 +; CHECK-LLVM: @bool_var = addrspace(1) global i1 false