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| 1 | +// RUN: sycl-mlir-opt -split-input-file -convert-sycl-to-llvm='use-opaque-pointers=0' -verify-diagnostics %s | FileCheck %s |
| 2 | + |
| 3 | +!sycl_array_1_ = !sycl.array<[1], (memref<1xi64>)> |
| 4 | +!sycl_range_1_ = !sycl.range<[1], (!sycl_array_1_)> |
| 5 | +func.func @cast_sycl_range_to_array(%arg0: memref<?x!sycl_range_1_>) -> memref<?x!sycl_array_1_> { |
| 6 | + // CHECK-LABEL: llvm.func @cast_sycl_range_to_array( |
| 7 | + // CHECK-SAME: [[SRC:%.*]]: !llvm.ptr<[[RANGE1:.*]]>) -> !llvm.ptr<[[ARRAY1:.*]]> |
| 8 | + // CHECK-NEXT: [[RES:%.*]] = llvm.bitcast [[SRC]] : !llvm.ptr<[[RANGE1]]> to !llvm.ptr<[[ARRAY1]]> |
| 9 | + // CHECK-NEXT: llvm.return [[RES]] : !llvm.ptr<[[ARRAY1]]> |
| 10 | + |
| 11 | + %0 = "sycl.cast"(%arg0) : (memref<?x!sycl_range_1_>) -> memref<?x!sycl_array_1_> |
| 12 | + func.return %0 : memref<?x!sycl_array_1_> |
| 13 | +} |
| 14 | + |
| 15 | +// ----- |
| 16 | + |
| 17 | +!sycl_array_1_ = !sycl.array<[1], (memref<1xi64>)> |
| 18 | +!sycl_id_1_ = !sycl.id<[1], (!sycl_array_1_)> |
| 19 | +func.func @cast_sycl_id_to_array(%arg0: memref<?x!sycl_id_1_>) -> memref<?x!sycl_array_1_> { |
| 20 | + // CHECK-LABEL: llvm.func @cast_sycl_id_to_array( |
| 21 | + // CHECK-SAME: [[SRC:%.*]]: !llvm.ptr<[[ID1:.*]]>) -> !llvm.ptr<[[ARRAY1]]> |
| 22 | + // CHECK-NEXT: [[RES:%.*]] = llvm.bitcast [[SRC]] : !llvm.ptr<[[ID1]]> to !llvm.ptr<[[ARRAY1]]> |
| 23 | + // CHECK-NEXT: llvm.return [[RES]] : !llvm.ptr<[[ARRAY1]]> |
| 24 | + |
| 25 | + %0 = "sycl.cast"(%arg0) : (memref<?x!sycl_id_1_>) -> memref<?x!sycl_array_1_> |
| 26 | + func.return %0: memref<?x!sycl_array_1_> |
| 27 | +} |
| 28 | + |
| 29 | +// ----- |
| 30 | + |
| 31 | +!sycl_id_1_ = !sycl.id<[1], (!sycl.array<[1], (memref<1xi64, 4>)>)> |
| 32 | +!sycl_range_1_ = !sycl.range<[1], (!sycl.array<[1], (memref<1xi64, 4>)>)> |
| 33 | +!sycl_accessor_1_i32_rw_gb = !sycl.accessor<[1, i32, read_write, global_buffer], (!sycl.accessor_impl_device<[1], (!sycl_id_1_, !sycl_range_1_, !sycl_range_1_)>, !llvm.struct<(ptr<i32, 1>)>)> |
| 34 | +func.func @cast_sycl_accessor_to_accessor_common(%arg0: memref<?x!sycl_accessor_1_i32_rw_gb>) -> memref<?x!sycl.accessor_common> { |
| 35 | + // CHECK-LABEL: llvm.func @cast_sycl_accessor_to_accessor_common( |
| 36 | + // CHECK-SAME: [[SRC:%.*]]: !llvm.ptr<[[ACC1:.*]]>) -> !llvm.ptr<[[COMMON:.*]]> |
| 37 | + // CHECK-NEXT: [[RES:%.*]] = llvm.bitcast [[SRC]] : !llvm.ptr<[[ACC1]]> to !llvm.ptr<[[COMMON]]> |
| 38 | + // CHECK-NEXT: llvm.return [[RES]] : !llvm.ptr<[[COMMON]]> |
| 39 | + |
| 40 | + %0 = "sycl.cast"(%arg0) : (memref<?x!sycl_accessor_1_i32_rw_gb>) -> memref<?x!sycl.accessor_common> |
| 41 | + func.return %0: memref<?x!sycl.accessor_common> |
| 42 | +} |
| 43 | + |
| 44 | +!sycl_LocalAccessorBaseDevice_1_ = !sycl.LocalAccessorBaseDevice<[1], (!sycl_range_1_, !sycl_range_1_, !sycl_id_1_)> |
| 45 | +!sycl_local_accessor_base_1_i32_rw = !sycl.local_accessor_base<[1, i32, read_write], (!sycl_LocalAccessorBaseDevice_1_, memref<?xi32, 3>)> |
| 46 | +func.func @cast_sycl_accessor_to_local_accessor_base(%arg0: memref<?x!sycl_accessor_1_i32_rw_gb>) -> memref<?x!sycl_local_accessor_base_1_i32_rw> { |
| 47 | + // CHECK-LABEL: llvm.func @cast_sycl_accessor_to_local_accessor_base( |
| 48 | + // CHECK-SAME: [[SRC:%.*]]: !llvm.ptr<[[ACC1]]>) -> !llvm.ptr<[[LOCALBASE:.*]]> |
| 49 | + // CHECK-NEXT: [[RES:%.*]] = llvm.bitcast [[SRC]] : !llvm.ptr<[[ACC1]]> to !llvm.ptr<[[LOCALBASE]]> |
| 50 | + // CHECK-NEXT: llvm.return [[RES]] : !llvm.ptr<[[LOCALBASE]]> |
| 51 | + |
| 52 | + %0 = "sycl.cast"(%arg0) : (memref<?x!sycl_accessor_1_i32_rw_gb>) -> memref<?x!sycl_local_accessor_base_1_i32_rw> |
| 53 | + func.return %0: memref<?x!sycl_local_accessor_base_1_i32_rw> |
| 54 | +} |
| 55 | + |
| 56 | +func.func @cast_sycl_accessor_to_owner_less_base(%arg0: memref<?x!sycl_accessor_1_i32_rw_gb>) -> memref<?x!sycl.owner_less_base> { |
| 57 | + // CHECK-LABEL: llvm.func @cast_sycl_accessor_to_owner_less_base( |
| 58 | + // CHECK-SAME: [[SRC:%.*]]: !llvm.ptr<[[ACC1]]>) -> !llvm.ptr<[[OWNERLESSBASE:.*]]> |
| 59 | + // CHECK-NEXT: [[RES:%.*]] = llvm.bitcast [[SRC]] : !llvm.ptr<[[ACC1]]> to !llvm.ptr<[[OWNERLESSBASE]]> |
| 60 | + // CHECK-NEXT: llvm.return [[RES]] : !llvm.ptr<[[OWNERLESSBASE]]> |
| 61 | + |
| 62 | + %0 = "sycl.cast"(%arg0) : (memref<?x!sycl_accessor_1_i32_rw_gb>) -> memref<?x!sycl.owner_less_base> |
| 63 | + func.return %0: memref<?x!sycl.owner_less_base> |
| 64 | +} |
| 65 | + |
| 66 | +// ----- |
| 67 | + |
| 68 | +!sycl_id_1_ = !sycl.id<[1], (!sycl.array<[1], (memref<1xi64, 4>)>)> |
| 69 | +!sycl_range_1_ = !sycl.range<[1], (!sycl.array<[1], (memref<1xi64, 4>)>)> |
| 70 | +!sycl_LocalAccessorBaseDevice_1_ = !sycl.LocalAccessorBaseDevice<[1], (!sycl_range_1_, !sycl_range_1_, !sycl_id_1_)> |
| 71 | +!sycl_local_accessor_base_1_i32_rw = !sycl.local_accessor_base<[1, i32, read_write], (!sycl_LocalAccessorBaseDevice_1_, memref<?xi32, 3>)> |
| 72 | +func.func @cast_sycl_local_accessor_base_to_accessor_common(%arg0: memref<?x!sycl_local_accessor_base_1_i32_rw>) -> memref<?x!sycl.accessor_common> { |
| 73 | + // CHECK-LABEL: llvm.func @cast_sycl_local_accessor_base_to_accessor_common( |
| 74 | + // CHECK-SAME: [[SRC:%.*]]: !llvm.ptr<[[LAB1:.*]]>) -> !llvm.ptr<[[COMMON]]> |
| 75 | + // CHECK-NEXT: [[RES:%.*]] = llvm.bitcast [[SRC]] : !llvm.ptr<[[LAB1]]> to !llvm.ptr<[[COMMON]]> |
| 76 | + // CHECK-NEXT: llvm.return [[RES]] : !llvm.ptr<[[COMMON]] |
| 77 | + %0 = "sycl.cast"(%arg0) : (memref<?x!sycl_local_accessor_base_1_i32_rw>) -> memref<?x!sycl.accessor_common> |
| 78 | + func.return %0: memref<?x!sycl.accessor_common> |
| 79 | +} |
| 80 | + |
| 81 | +!sycl_local_accessor_1_i32_rw = !sycl.local_accessor<[1, i32], (!sycl_local_accessor_base_1_i32_rw)> |
| 82 | +func.func @cast_sycl_local_accessor_to_local_accessor_base(%arg0: memref<?x!sycl_local_accessor_1_i32_rw>) -> memref<?x!sycl_local_accessor_base_1_i32_rw> { |
| 83 | + // CHECK-LABEL: llvm.func @cast_sycl_local_accessor_to_local_accessor_base( |
| 84 | + // CHECK-SAME: [[SRC:%.*]]: !llvm.ptr<[[LA1:.*]]>) -> !llvm.ptr<[[LAB1]]> |
| 85 | + // CHECK-NEXT: [[RES:%.*]] = llvm.bitcast [[SRC]] : !llvm.ptr<[[LA1]]> to !llvm.ptr<[[LAB1]]> |
| 86 | + // CHECK-NEXT: llvm.return [[RES]] : !llvm.ptr<[[LAB1]] |
| 87 | + |
| 88 | + %0 = "sycl.cast"(%arg0) : (memref<?x!sycl_local_accessor_1_i32_rw>) -> memref<?x!sycl_local_accessor_base_1_i32_rw> |
| 89 | + func.return %0: memref<?x!sycl_local_accessor_base_1_i32_rw> |
| 90 | +} |
| 91 | + |
| 92 | + |
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