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[SYCL] E2E test to retain PI events until they have signaled #180
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Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
bso-intel
previously approved these changes
Mar 12, 2021
SYCL/Plugin/retain_events.cpp
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| std::fill(dst, dst + N, 0); | ||
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| for (int i = 0; i < 256; ++i) { | ||
| sycl::queue Q { C , D, async_sycl_error };//, sycl::property::queue::enable_profiling() }; |
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| sycl::queue Q { C , D, async_sycl_error };//, sycl::property::queue::enable_profiling() }; | |
| sycl::queue Q { C , D, async_sycl_error }; |
bader
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Mar 15, 2021
It is illegal to destroy an event until it is completed in the GPU. This change prevents sporadic failures due to Level-Zero RT crashes because we released event too early. I am adding E2E test: intel/llvm-test-suite#180 Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
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@smaslov-intel, could you please fix clang-format issue? |
vladimirlaz
suggested changes
Mar 16, 2021
Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
vladimirlaz
approved these changes
Apr 6, 2021
bader
reviewed
Mar 14, 2022
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@smaslov-intel, @againull, shouldn't we set SYCL_PI_LEVEL_ZERO_TRACK_INDIRECT_ACCESS_MEMORY or wait for all kernels to complete before freeing USM memory to make this test valid?
aelovikov-intel
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Mar 27, 2023
…lvm-test-suite#180) Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
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Covers the change in intel/llvm#3350
Signed-off-by: Sergey V Maslov sergey.v.maslov@intel.com