@@ -209,6 +209,8 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
209
209
RESULT_INT (0 );
210
210
break ;
211
211
case CL_DEVICE_GLOBAL_MEM_SIZE: {
212
+ #ifdef __arm__
213
+ // TODO: legacy code here, need to verify correctness with ARM board
212
214
auto gmem_id = acl_get_default_device_global_memory (device->def );
213
215
if (gmem_id < 0 ) {
214
216
RESULT_INT (0 );
@@ -217,10 +219,20 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
217
219
cl_ulong size =
218
220
ACL_RANGE_SIZE (device->def .autodiscovery_def .global_mem_defs [gmem_id]
219
221
.get_usable_range ());
220
- #ifdef __arm__
221
222
// on SoC board, two DDR systems are not equivalent
222
223
// so only half can be accessed with a single alloc.
223
224
size /= 2 ;
225
+ #else
226
+ cl_ulong size = 0 ;
227
+ for (unsigned gmem_idx = 0 ;
228
+ gmem_idx < device->def .autodiscovery_def .num_global_mem_systems ;
229
+ gmem_idx++) {
230
+ if (device->def .autodiscovery_def .global_mem_defs [gmem_idx].type ==
231
+ ACL_GLOBAL_MEM_DEVICE_PRIVATE) {
232
+ size += ACL_RANGE_SIZE (
233
+ device->def .autodiscovery_def .global_mem_defs [gmem_idx].range );
234
+ }
235
+ }
224
236
#endif
225
237
RESULT_ULONG (size);
226
238
break ;
@@ -251,13 +263,9 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
251
263
RESULT_UINT (acl_platform.max_constant_args );
252
264
break ;
253
265
254
- // "desktop" profile says global memory must be at least 128MB
255
- // "embedded" profile says global memory must be at least 1MB
256
266
case CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE: {
257
- // Constant memory is global memory.
258
- // However conformance_test_api min_max_constant_buffer_size
259
- // expects to allocate two buffers of the size we say here.
260
- // So be a shade conservative and cut it down by 4.
267
+ #ifdef __arm__
268
+ // TODO: legacy code here, need to verify correctness with ARM board
261
269
auto gmem_id = acl_get_default_device_global_memory (device->def );
262
270
if (gmem_id < 0 ) {
263
271
RESULT_INT (0 );
@@ -267,13 +275,43 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
267
275
ACL_RANGE_SIZE (device->def .autodiscovery_def .global_mem_defs [gmem_id]
268
276
.get_usable_range ()) /
269
277
4 ;
270
- #ifdef __arm__
271
- // see above
278
+ // Cut by 2 again, see comment for CL_DEVICE_GLOBAL_MEM_SIZE
272
279
size /= 2 ;
280
+ #else
281
+ // Return the maximum size of a single allocation to the constant memory
282
+ // (i.e., global memory)
283
+ cl_ulong size = 0 ;
284
+ for (unsigned gmem_idx = 0 ;
285
+ gmem_idx < device->def .autodiscovery_def .num_global_mem_systems ;
286
+ gmem_idx++) {
287
+ if (device->def .autodiscovery_def .global_mem_defs [gmem_idx].type ==
288
+ ACL_GLOBAL_MEM_DEVICE_PRIVATE) {
289
+ cl_ulong curr_size = 0 ;
290
+ // TODO: investigate if ACL_MEM_ALIGN of 0x400 is still required to
291
+ // perform device allocations to memory with 0 starting address
292
+ if (device->def .autodiscovery_def .global_mem_defs [gmem_idx]
293
+ .allocation_type &
294
+ ACL_GLOBAL_MEM_DEVICE_ALLOCATION) {
295
+ curr_size = ACL_RANGE_SIZE (
296
+ device->def .autodiscovery_def .global_mem_defs [gmem_idx]
297
+ .get_usable_range ());
298
+ } else {
299
+ curr_size = ACL_RANGE_SIZE (
300
+ device->def .autodiscovery_def .global_mem_defs [gmem_idx].range );
301
+ }
302
+ if (curr_size > size) {
303
+ size = curr_size;
304
+ }
305
+ }
306
+ }
307
+ // Note: devices not of type CL_DEVICE_TYPE_CUSTOM and conformant
308
+ // to OpenCL 1.2 spec will return size at least of 64KB here
273
309
#endif
274
310
RESULT_ULONG (size);
275
311
} break ;
276
312
case CL_DEVICE_MAX_MEM_ALLOC_SIZE: {
313
+ #ifdef __arm__
314
+ // TODO: legacy code here, need to verify correctness with ARM board
277
315
auto gmem_id = acl_get_default_device_global_memory (device->def );
278
316
if (gmem_id < 0 ) {
279
317
RESULT_INT (0 );
@@ -282,7 +320,6 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
282
320
cl_ulong size =
283
321
ACL_RANGE_SIZE (device->def .autodiscovery_def .global_mem_defs [gmem_id]
284
322
.get_usable_range ());
285
- #ifdef __arm__
286
323
// on SoC board, two DDR systems are not equivalent
287
324
// so only half can be accessed with a single alloc.
288
325
@@ -294,6 +331,34 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
294
331
} else {
295
332
size = size / 8 ;
296
333
}
334
+ #else
335
+ cl_ulong size = 0 ;
336
+ for (unsigned gmem_idx = 0 ;
337
+ gmem_idx < device->def .autodiscovery_def .num_global_mem_systems ;
338
+ gmem_idx++) {
339
+ if (device->def .autodiscovery_def .global_mem_defs [gmem_idx].type ==
340
+ ACL_GLOBAL_MEM_DEVICE_PRIVATE) {
341
+ cl_ulong curr_size = 0 ;
342
+ // TODO: investigate if ACL_MEM_ALIGN of 0x400 is still required to
343
+ // perform device allocations to memory with 0 starting address
344
+ if (device->def .autodiscovery_def .global_mem_defs [gmem_idx]
345
+ .allocation_type &
346
+ ACL_GLOBAL_MEM_DEVICE_ALLOCATION) {
347
+ curr_size = ACL_RANGE_SIZE (
348
+ device->def .autodiscovery_def .global_mem_defs [gmem_idx]
349
+ .get_usable_range ());
350
+ } else {
351
+ curr_size = ACL_RANGE_SIZE (
352
+ device->def .autodiscovery_def .global_mem_defs [gmem_idx].range );
353
+ }
354
+ if (curr_size > size) {
355
+ size = curr_size;
356
+ }
357
+ }
358
+ }
359
+ // Note: devices not of type CL_DEVICE_TYPE_CUSTOM and
360
+ // conformant to OpenCL 1.2 spec will return size at least of
361
+ // max(CL_DEVICE_GLOBAL_MEM_SIZE/4, 1*1024*1024) here
297
362
#endif
298
363
RESULT_ULONG (size);
299
364
} break ;
0 commit comments