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Enable madvise autoreset by default for shared system USM
Signed-off-by: John Falkowski <john.falkowski@intel.com>
1 parent f827cda commit aed41b2

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4 files changed

+26
-5
lines changed

4 files changed

+26
-5
lines changed

shared/source/debug_settings/debug_variables_base.inl

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -533,6 +533,7 @@ DECLARE_DEBUG_VARIABLE(int32_t, RenderCompressedImagesEnabled, -1, "-1: default,
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DECLARE_DEBUG_VARIABLE(int32_t, RenderCompressedBuffersEnabled, -1, "-1: default, 0: disabled, 1: enabled")
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DECLARE_DEBUG_VARIABLE(int32_t, EnableUsmConcurrentAccessSupport, 0, "0: default, >0: bitmask with usm capabilities to enable concurrent access for (bit0: host, bit1: device, bit2: shared single-device, bit3: shared cross-device, bit4: shared system)")
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DECLARE_DEBUG_VARIABLE(int32_t, EnableSharedSystemUsmSupport, -1, "-1: default, 0: shared system memory disabled, 1: shared system memory enabled")
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DECLARE_DEBUG_VARIABLE(int32_t, DisableMadviseAutoReset, 0, "0: default, madvise autoreset vm_bind flag not disabled , 1: madvise autoreset vm_bind flag disabled")
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DECLARE_DEBUG_VARIABLE(int32_t, EnablePassInlineData, -1, "-1: default, 0: Do not allow to pass inline data 1: Enable passing of inline data")
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DECLARE_DEBUG_VARIABLE(int32_t, ForceFineGrainedSVMSupport, -1, "-1: default, 0: Do not report Fine Grained SVM capabilities 1: Report SVM Fine Grained capabilities if device supports SVM")
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DECLARE_DEBUG_VARIABLE(int32_t, UseAsyncDrmExec, -1, "-1: default, 0: Disabled 1: Enabled. If enabled, pass EXEC_OBJECT_ASYNC to exec ioctl.")

shared/source/os_interface/linux/drm_neo.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1730,7 +1730,11 @@ int Drm::createDrmVirtualMemory(uint32_t &drmVmId) {
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auto &productHelper = rootDeviceEnvironment.getHelper<ProductHelper>();
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VmBindParams vmBind{};
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vmBind.vmId = static_cast<uint32_t>(ctl.vmId);
1733-
vmBind.flags = DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
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if (debugManager.flags.DisableMadviseAutoReset.get() == 1) {
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vmBind.flags = DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR;
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} else {
1736+
vmBind.flags = DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR | DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET;
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}
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vmBind.length = this->getSharedSystemAllocAddressRange();
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vmBind.sharedSystemUsmEnabled = true;
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vmBind.sharedSystemUsmBind = true;

shared/test/common/test_files/igdrcl.config

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -189,6 +189,7 @@ EnableStateComputeModeTracking = -1
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EnableSetPair = -1
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EnableUsmConcurrentAccessSupport = 0
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EnableSharedSystemUsmSupport = -1
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DisableMadviseAutoReset = 0
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EnablePassInlineData = -1
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ForceFineGrainedSVMSupport = -1
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EnableImmediateCmdListHeapSharing = -1

third_party/uapi/drm-next/xe/xe_drm.h

Lines changed: 19 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,8 @@
33
* Copyright © 2023 Intel Corporation
44
*/
55

6-
#ifndef _XE_DRM_H_
7-
#define _XE_DRM_H_
6+
#ifndef _UAPI_XE_DRM_H_
7+
#define _UAPI_XE_DRM_H_
88

99
#include "drm.h"
1010

@@ -140,7 +140,7 @@ extern "C" {
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* redefine the interface more easily than an ever growing struct of
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* increasing complexity, and for large parts of that interface to be
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* entirely optional. The downside is more pointer chasing; chasing across
143-
* the boundary with pointers encapsulated inside u64.
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* the __user boundary with pointers encapsulated inside u64.
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*
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* Example chaining:
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*
@@ -1013,6 +1013,20 @@ struct drm_xe_vm_destroy {
10131013
* valid on VMs with DRM_XE_VM_CREATE_FLAG_FAULT_MODE set. The CPU address
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* mirror flag are only valid for DRM_XE_VM_BIND_OP_MAP operations, the BO
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* handle MBZ, and the BO offset MBZ.
1016+
* - %DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET - Can be used in combination with
1017+
* %DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR to reset madvises when the underlying
1018+
* CPU address space range is unmapped (typically with munmap(2) or brk(2)).
1019+
* The madvise values set with %DRM_IOCTL_XE_MADVISE are reset to the values
1020+
* that were present immediately after the %DRM_IOCTL_XE_VM_BIND.
1021+
* The reset GPU virtual address range is the intersection of the range bound
1022+
* using %DRM_IOCTL_XE_VM_BIND and the virtual CPU address space range
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* unmapped.
1024+
* This functionality is present to mimic the behaviour of CPU address space
1025+
* madvises set using madvise(2), which are typically reset on unmap.
1026+
* Note: free(3) may or may not call munmap(2) and/or brk(2), and may thus
1027+
* not invoke autoreset. Neither will stack variables going out of scope.
1028+
* Therefore it's recommended to always explicitly reset the madvises when
1029+
* freeing the memory backing a region used in a %DRM_IOCTL_XE_MADVISE call.
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*
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* The @prefetch_mem_region_instance for %DRM_XE_VM_BIND_OP_PREFETCH can also be:
10181032
* - %DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC, which ensures prefetching occurs in
@@ -1119,6 +1133,7 @@ struct drm_xe_vm_bind_op {
11191133
#define DRM_XE_VM_BIND_FLAG_DUMPABLE (1 << 3)
11201134
#define DRM_XE_VM_BIND_FLAG_CHECK_PXP (1 << 4)
11211135
#define DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR (1 << 5)
1136+
#define DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET (1 << 6)
11221137
/** @flags: Bind flags */
11231138
__u32 flags;
11241139

@@ -2258,4 +2273,4 @@ struct drm_xe_vm_query_mem_range_attr {
22582273
}
22592274
#endif
22602275

2261-
#endif /* _XE_DRM_H_ */
2276+
#endif /* _UAPI_XE_DRM_H_ */

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