[interrupt-handlers] adds exception handling to the hyperlight guest #250
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This looks to be in pretty good shape overall. A general comment: for structure, bitfield, etc. layouts, please cite the Intel or AMD manuals (either is fine, but we should pick one and stick with it, unless the explanation in the other is far better), instead of the osdev wiki. The manuals, unlike the wiki, are authoritative and unlikely to change :)
On a procedural note: can we squash the "fixes" commits into the original commits (or at least turn them into fixup!s immediately after the original commit, that we have checked will squash nicely without conflicts, and then run rebase --autosquash before merging?)
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…n handler - interrupt handler entry stubs = -- added macros to save/restore register context -- added defintions for different exceptions (_do_excp0-20+30), which save context, set params per SysV ABI, call handler, restore context, then iretq via macros. - added an exception handler that are used by the _do_excp* fxns. Note: this code is specific for x86_64 Signed-off-by: danbugs <danilochiarlone@gmail.com>
- added IdtEntry structure, - created IDT static mut array, and - made fxns to init_idt and set_idt_entry. Signed-off-by: danbugs <danilochiarlone@gmail.com>
- made Idtr structure (+ its static mut global var) to house the IDT, and - made load_idt fxn that uses global_asm's lidt to load the IDT. Signed-off-by: danbugs <danilochiarlone@gmail.com>
- added GdtEntry struct for GDT static mut global var, - added null, kernel code, and kernel data segments to GDT, - added code to load the GDT, and - added calls to init_idt, load_idt, and load_gdt to entrypoint. Signed-off-by: danbugs <danilochiarlone@gmail.com>
- added new guest fxn to simpleguest that triggers an invalid opcode exception - added test in guest_dispatch that calls the new guest fxn to test exception handling Signed-off-by: danbugs <danilochiarlone@gmail.com>
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simongdavies
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This PR introduces exception handling to the Hyperlight guest by setting up and loading a Global Descriptor Table (GDT) and an Interrupt Descriptor Table (IDT) onto the CPU.
GDT Setup & Loading
lgdt.IDT Setup & Exception Handlers
iretq.context_saveandcontext_restoreto properly preserve CPU state.lidt.This PR closes #228.