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Dirk EibachAndy Fleming
Dirk Eibach
authored and
Andy Fleming
committed
mpc85xx: Add gdsys ControlCenter Digital board
The gdsys ControlCenter Digital board is based on a Freescale P1022 QorIQ SOC. It boots from SPI-Flash but can be configured to boot from SD-card for factory programming and testing. On board peripherals include: - 2x GbE - Lattice ECP3 FPGA connected via PCIe - mSATA RAID1 - USB host - DisplayPort video output - Atmel TPM Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Signed-off-by: Andy Fleming <afleming@freescale.com>
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‎MAINTAINERS

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@@ -160,8 +160,9 @@ egnite GmbH <info@egnite.de>
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Dirk Eibach <eibach@gdsys.de>
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controlcenterd P1022
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devconcenter PPC460EX
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dlvision PPC405EP
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dlvision PPC405EP
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dlvision-10g PPC405EP
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gdppc440etx PPC440EP/GR
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intip PPC460EX

‎board/gdsys/common/Makefile

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@@ -33,6 +33,7 @@ COBJS-$(CONFIG_IO) += miiphybb.o
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COBJS-$(CONFIG_IO64) += miiphybb.o
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COBJS-$(CONFIG_IOCON) += osd.o
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COBJS-$(CONFIG_DLVISION_10G) += osd.o
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COBJS-$(CONFIG_CONTROLCENTERD) += dp501.o
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COBJS := $(COBJS-y)
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SOBJS =

‎board/gdsys/common/dp501.c

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/*
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* (C) Copyright 2012
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* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* Parade Technologies Inc. DP501 DisplayPort DVI/HDMI Transmitter */
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#include <common.h>
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#include <asm/io.h>
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#include <errno.h>
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#include <i2c.h>
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static void dp501_setbits(u8 addr, u8 reg, u8 mask)
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{
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u8 val;
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val = i2c_reg_read(addr, reg);
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setbits_8(&val, mask);
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i2c_reg_write(addr, reg, val);
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}
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static void dp501_clrbits(u8 addr, u8 reg, u8 mask)
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{
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u8 val;
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val = i2c_reg_read(addr, reg);
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clrbits_8(&val, mask);
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i2c_reg_write(addr, reg, val);
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}
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static int dp501_detect_cable_adapter(u8 addr)
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{
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u8 val = i2c_reg_read(addr, 0x00);
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return !(val & 0x04);
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}
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static void dp501_link_training(u8 addr)
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{
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u8 val;
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val = i2c_reg_read(addr, 0x51);
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i2c_reg_write(addr, 0x5d, val); /* set link_bw */
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val = i2c_reg_read(addr, 0x52);
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i2c_reg_write(addr, 0x5e, val); /* set lane_cnt */
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val = i2c_reg_read(addr, 0x53);
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i2c_reg_write(addr, 0x5c, val); /* set downspread_ctl */
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i2c_reg_write(addr, 0x5f, 0x0d); /* start training */
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}
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void dp501_powerup(u8 addr)
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{
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dp501_clrbits(addr, 0x0a, 0x30); /* power on encoder */
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i2c_reg_write(addr, 0x27, 0x30); /* Hardware auto detect DVO timing */
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dp501_setbits(addr, 0x72, 0x80); /* DPCD read enable */
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dp501_setbits(addr, 0x30, 0x20); /* RS polynomial select */
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i2c_reg_write(addr, 0x71, 0x20); /* Enable Aux burst write */
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dp501_setbits(addr, 0x78, 0x30); /* Disable HPD2 IRQ */
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dp501_clrbits(addr, 0x2f, 0x40); /* Link FIFO reset selection */
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i2c_reg_write(addr, 0x24, 0xc0); /* SDR mode 0, ext. H/VSYNC */
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i2c_reg_write(addr + 2, 0x24, 0x02); /* clock input single ended */
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if (dp501_detect_cable_adapter(addr)) {
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printf("DVI/HDMI cable adapter detected\n");
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i2c_reg_write(addr, 0x5e, 0x04); /* enable 4 channel */
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dp501_clrbits(addr, 0x00, 0x08); /* DVI/HDMI HDCP operation */
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} else {
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printf("no DVI/HDMI cable adapter detected\n");
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i2c_reg_write(addr + 2, 0x00, 0x18); /* driving strength */
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i2c_reg_write(addr + 2, 0x03, 0x06); /* driving strength */
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i2c_reg_write(addr, 0x2c, 0x00); /* configure N value */
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i2c_reg_write(addr, 0x2d, 0x00); /* configure N value */
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i2c_reg_write(addr, 0x2e, 0x0c); /* configure N value */
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i2c_reg_write(addr, 0x76, 0xff); /* clear all interrupt */
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dp501_setbits(addr, 0x78, 0x03); /* clear all interrupt */
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i2c_reg_write(addr, 0x75, 0xf8); /* aux channel reset */
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i2c_reg_write(addr, 0x75, 0x00); /* clear aux channel reset */
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i2c_reg_write(addr, 0x87, 0x70); /* set retry counter as 7 */
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dp501_setbits(addr, 0x00, 0x08); /* for DP HDCP operation */
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dp501_link_training(addr);
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}
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}
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void dp501_powerdown(u8 addr)
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{
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dp501_setbits(addr, 0x0a, 0x30); /* power down encoder, standby mode */
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}

‎board/gdsys/common/dp501.h

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/*
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* (C) Copyright 2012
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* Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _DP501_H_
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#define _DP501_H_
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void dp501_powerup(u8 addr);
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void dp501_powerdown(u8 addr);
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#endif

‎board/gdsys/p1022/Makefile

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#
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# Copyright 2010 Freescale Semiconductor, Inc.
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of the GNU General Public License as published by the Free
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# Software Foundation; either version 2 of the License, or (at your option)
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# any later version.
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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# COBJS-y += $(BOARD).o
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COBJS-y += law.o
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COBJS-y += ddr.o
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COBJS-y += tlb.o
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COBJS-y += sdhc_boot.o
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COBJS-$(CONFIG_CONTROLCENTERD) += controlcenterd.o controlcenterd-id.o
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COBJS-$(CONFIG_FSL_DIU_FB) += diu.o
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################

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