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Add support for cortex_m0 (m0+, m1) to scheduler #14

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bharrisau opened this issue May 5, 2014 · 2 comments
Open

Add support for cortex_m0 (m0+, m1) to scheduler #14

bharrisau opened this issue May 5, 2014 · 2 comments

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@bharrisau
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Some of the operations used by the scheduler (STMDB) aren't supported by the cheaper cores. I think the assembler also complains about the SVC call, which is supported (so perhaps the assembler is incorrect).

@farcaller
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I have managed to compile svc stub with no issues.

Cortex cores would share most of the code from current hal::cortex_m3 module, so there are two tasks in the scope of the bug:

  • add sched.S, simplified down for cortex-m0 ISA
  • update build toolchain to pick correct file based on current :arch

@bharrisau
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Looks like the m0 will need to look like this https://github.com/RT-Thread/rt-thread/blob/master/libcpu/arm/cortex-m0/context_iar.S#L115

@farcaller farcaller added the ready label Jun 9, 2015
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