Use a reserved ISR to prevent GC of default handler

Author: bharrisau

src/hal/cortex_m3/isr.rs

@@ -28,6 +28,7 @@ extern {
   fn isr_svcall();
   fn isr_pendsv();
   fn isr_systick();
+  fn isr_default_fault();
 }
 
 static ISRCount: uint = 16;
@@ -43,7 +44,8 @@ pub static ISRVectors: [Option<unsafe extern fn()>, ..ISRCount] = [
   Some(isr_busfault),     // CM3 Bus Fault
   Some(isr_usagefault),   // CM3 Usage Fault
   Some(_boot_checksum),   // NXP Checksum code
-  None,                   // Reserved
+  // This is Reserved, but using it to prevent default handler from being GC
+  Some(isr_default_fault), // Reserved
   None,                   // Reserved
   None,                   // Reserved
   Some(isr_svcall),       // SVCall