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Issues list

DRAM in Glenside hardware This involves some hardware knowledge research This is a research problem
#52 opened Oct 9, 2020 by gussmith23
Model the tensor sequencer in Glenside hardware This involves some hardware knowledge language The design of the Glenside language itself research This is a research problem
#51 opened Oct 9, 2020 by gussmith23
Implementing batch norms in hardware codegen Pertaining to Glenside's codegen stage hardware This involves some hardware knowledge
#46 opened Oct 9, 2020 by gussmith23
3 tasks
Implement non-im2col'ed convolutions hardware This involves some hardware knowledge
#45 opened Oct 9, 2020 by gussmith23
How should separable convolutions get run on systolic arrays? hardware This involves some hardware knowledge new workload Supporting a new workload within Glenside research This is a research problem
#44 opened Oct 8, 2020 by gussmith23
ProTip! Updated in the last three days: updated:>2024-10-30.