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Port linscan to CFG (ocaml-flambda#1007)
* Port linscan to CFG. * Disabled debugging mode. * Taking the validation snapshot is not free. * Review * Fix test. * ocamlformat * Update backend/cfg/cfg_ls_utils.mli Co-authored-by: Greta Yorsh <45005955+gretay-js@users.noreply.github.com> * Update backend/asmgen.ml Co-authored-by: Greta Yorsh <45005955+gretay-js@users.noreply.github.com> * Update driver/flambda_backend_args.ml Co-authored-by: Greta Yorsh <45005955+gretay-js@users.noreply.github.com> * Properly temporarily change the flag. * Tweak validation. * Comment out unused function which is likely to be used later. * Comments / review. * ocamlformat --------- Co-authored-by: Greta Yorsh <45005955+gretay-js@users.noreply.github.com>
1 parent 4a6580c commit d7be9b4

31 files changed

+1626
-377
lines changed

‎.github/workflows/build.yml

+7-7
Original file line numberDiff line numberDiff line change
@@ -73,11 +73,14 @@ jobs:
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- name: irc
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config: --enable-middle-end=flambda2
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os: ubuntu-latest
76-
ocamlparam: ''
76+
ocamlparam: '_,w=-46,regalloc=irc,regalloc-param=IRC_SPLIT:off,regalloc-param=IRC_SPILLING_HEURISTICS:flat-uses'
77+
check_arch: true
78+
79+
- name: ls
80+
config: --enable-middle-end=flambda2
81+
os: ubuntu-latest
82+
ocamlparam: '_,w=-46,regalloc=ls,regalloc-param=LS_ORDER:layout'
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check_arch: true
78-
register_allocator: irc
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irc_split: off
80-
irc_spilling_heuristics: flat_uses
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- name: irc_frame_pointers
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config: --enable-middle-end=flambda2 --enable-frame-pointers
@@ -97,9 +100,6 @@ jobs:
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# On macOS, the testsuite is slow, so run only on push to main (#507)
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run_testsuite: "${{matrix.os != 'macos-latest' || (github.event_name == 'push' && github.event.ref == 'refs/heads/main')}}"
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build_upstream: "${{matrix.name == 'build_upstream_closure'}}"
100-
REGISTER_ALLOCATOR: "${{matrix.register_allocator}}"
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IRC_SPLIT: "${{matrix.irc_split}}"
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IRC_SPILLING_HEURISTICS: "${{matrix.irc_spilling_heuristics}}"
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steps:
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- name: Checkout the Flambda backend repo

‎backend/amd64/cfg_stack_operands.ml

+5-5
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ let may_use_stack_operand_for_second_argument
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check_lengths instr ~of_arg:2 ~of_res:1;
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check_same "res(0)" instr.res.(0) "arg(0)" instr.arg.(0);
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end;
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begin match is_spilled instr.arg.(1) with
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begin match is_spilled map instr.arg.(1) with
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| false -> ()
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| true ->
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use_stack_operand map instr.arg 1;
@@ -24,7 +24,7 @@ let may_use_stack_operand_for_only_argument
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: type a . has_result:bool -> spilled_map -> a Cfg.instruction -> stack_operands_rewrite
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= fun ~has_result map instr ->
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if debug then check_lengths instr ~of_arg:1 ~of_res:(if has_result then 1 else 0);
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begin match is_spilled instr.arg.(0) with
27+
begin match is_spilled map instr.arg.(0) with
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| false -> ()
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| true ->
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use_stack_operand map instr.arg 0
@@ -38,7 +38,7 @@ let may_use_stack_operand_for_only_result
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: type a . spilled_map -> a Cfg.instruction -> stack_operands_rewrite
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= fun map instr ->
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if debug then check_lengths instr ~of_arg:0 ~of_res:1;
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begin match is_spilled instr.res.(0) with
41+
begin match is_spilled map instr.res.(0) with
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| false ->
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All_spilled_registers_rewritten
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| true ->
@@ -52,7 +52,7 @@ let may_use_stack_operand_for_result
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if debug then begin
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check_lengths instr ~of_arg:num_args ~of_res:1;
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end;
55-
begin match is_spilled instr.res.(0) with
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begin match is_spilled map instr.res.(0) with
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| false -> ()
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| true ->
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if Reg.same instr.arg.(0) instr.res.(0) then begin
@@ -102,7 +102,7 @@ let binary_operation
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if already_has_memory_operand then
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May_still_have_spilled_registers
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else begin
105-
match is_spilled instr.arg.(0), is_spilled instr.arg.(1) with
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match is_spilled map instr.arg.(0), is_spilled map instr.arg.(1) with
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| false, false ->
107107
begin match result with
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| No_result | Result_can_be_on_stack ->

‎backend/arm64/cfg_stack_operands.ml

+1-1
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ let basic (map : spilled_map) (instr : Cfg.basic Cfg.instruction) =
88
match instr.desc with
99
| Op (Specific Imove32) ->
1010
if debug then check_lengths instr ~of_arg:1 ~of_res:1;
11-
begin match is_spilled instr.arg.(0), is_spilled instr.res.(0) with
11+
begin match is_spilled map instr.arg.(0), is_spilled map instr.res.(0) with
1212
| false, false ->
1313
All_spilled_registers_rewritten
1414
| false, true ->

‎backend/asmgen.ml

+20-14
Original file line numberDiff line numberDiff line change
@@ -250,15 +250,18 @@ let cfgize (f : Mach.fundecl) : Cfg_with_layout.t =
250250
type register_allocator =
251251
| Upstream
252252
| IRC
253+
| LS
253254

254-
let register_allocator : register_allocator =
255-
match Sys.getenv_opt "REGISTER_ALLOCATOR" with
256-
| None -> Upstream
257-
| Some id ->
258-
match String.lowercase_ascii id with
259-
| "irc" -> IRC
260-
| "" | "upstream" -> Upstream
261-
| _ -> Misc.fatal_errorf "unknown register allocator %S" id
255+
let default_allocator = Upstream
256+
257+
let register_allocator fd : register_allocator =
258+
match String.lowercase_ascii !Flambda_backend_flags.regalloc with
259+
| "cfg" -> if should_use_linscan fd then LS else IRC
260+
| "irc" -> IRC
261+
| "ls" -> LS
262+
| "upstream" -> Upstream
263+
| "" -> default_allocator
264+
| other -> Misc.fatal_errorf "unknown register allocator (%S)" other
262265

263266
let compile_fundecl ~ppf_dump ~funcnames fd_cmm =
264267
Proc.init ();
@@ -283,11 +286,10 @@ let compile_fundecl ~ppf_dump ~funcnames fd_cmm =
283286
++ Profile.record ~accumulate:true "checkmach"
284287
(Checkmach.fundecl ~future_funcnames:funcnames ppf_dump)
285288
++ Profile.record ~accumulate:true "regalloc" (fun (fd : Mach.fundecl) ->
286-
let force_linscan = should_use_linscan fd in
287-
match force_linscan, register_allocator with
288-
| false, IRC ->
289+
match register_allocator fd with
290+
| ((IRC | LS) as regalloc) ->
289291
fd
290-
++ Profile.record ~accumulate:true "irc" (fun fd ->
292+
++ Profile.record ~accumulate:true "cfg" (fun fd ->
291293
let cfg =
292294
fd
293295
++ Profile.record ~accumulate:true "cfgize" cfgize
@@ -299,15 +301,19 @@ let compile_fundecl ~ppf_dump ~funcnames fd_cmm =
299301
Cfg_regalloc_validate.Description.create (Cfg_with_liveness.cfg_with_layout cfg)
300302
in
301303
cfg
302-
++ Profile.record ~accumulate:true "cfg_irc" Cfg_irc.run
304+
++ begin match regalloc with
305+
| IRC -> Profile.record ~accumulate:true "cfg_irc" Cfg_irc.run
306+
| LS -> Profile.record ~accumulate:true "cfg_ls" Cfg_ls.run
307+
| Upstream -> assert false
308+
end
303309
++ Cfg_with_liveness.cfg_with_layout
304310
++ Profile.record ~accumulate:true "cfg_validate_description" (Cfg_regalloc_validate.run cfg_description)
305311
++ Profile.record ~accumulate:true "cfg_simplify" Cfg_regalloc_utils.simplify_cfg
306312
++ Profile.record ~accumulate:true "save_cfg" save_cfg
307313
++ Profile.record ~accumulate:true "cfg_reorder_blocks"
308314
(reorder_blocks_random ppf_dump)
309315
++ Profile.record ~accumulate:true "cfg_to_linear" Cfg_to_linear.run)
310-
| true, _ | false, Upstream ->
316+
| Upstream ->
311317
fd
312318
++ Profile.record ~accumulate:true "default" (fun fd ->
313319
fd

‎backend/cfg/cfg_intf.ml

+2-1
Original file line numberDiff line numberDiff line change
@@ -141,7 +141,8 @@ module S = struct
141141
mutable live : Reg.Set.t;
142142
mutable stack_offset : int;
143143
id : int;
144-
mutable irc_work_list : irc_work_list
144+
mutable irc_work_list : irc_work_list;
145+
mutable ls_order : int
145146
}
146147

147148
(* [basic] instruction cannot raise *)

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