vec: optimize AVX2/FMA sum-of-squares with loop unrolling and FMA #17642
+25
−11
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This simply change has greatly affected
vec_dot_q, and in my tests it floats strongly, sometimes 2-3-4 times almost higher, and sometimes a 2-3 times worse.Full Benchmark
Description
__m256vector registers are used to accumulate partial sums in parallel. This breaks the dependency chain on a single accumulator, allowing for better pipeline utilization._mm256_fmadd_psintrinsic is explicitly used forval * val + sum_vec, combining the multiplication and addition into a single instruction, which can improve both throughput and numerical precision.meanonce: Themeanvalue is broadcast to a__m256vector once outside the loop (mean_vec), avoiding repeated broadcasts within the loop.References:
Intel - Fast Parallel Reductions with SIMD Instructions:
Intel - Fused Multiply-Add (FMA) Instructions:
Wikipedia - Loop Unrolling:
Co-Authored-By: Gemini 2.5 Pro (References and description commit changes)