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Assembly MIPS - Pipelined Datapath - Memory Hierarchy - Virtual Memory | Computer Architecture at ECE NTUA

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Analytical Assignments for the Computer Architecture course, during the 5th semester of the School of Electrical and Computer Engineering at the National Technical University of Athens.

Analytical Assignments

There were 4 analytical assignments in total, aiming to provide a comprehensive exploration of fundamental concepts in computer architecture. These assignments will deepen the understanding of the inner workings of computer systems, from the low-level hardware details to memory management strategies of modern computing.

Analytical 01 - Assembly MIPS

This assignment was about becoming familiar and working with MIPS Assembly by creating various routines. To implement these routines MIPS emulator like MILE can be used. In this emulator, MIPS assembly can be executed while monitoring the contents of registers and memory, thus making it easier to develop and test the required code.

Analytical 02 - Pipelined Datapath

This assignment was about creating timing diagrams for the execution of a code in a pipelined processor and calculating the total execution time, on different scenarios, considering forwarding mechanisms. It emphasized understanding pipeline execution in a MIPS processor, identifying hazards, and optimizing code execution with these forwarding mechanisms.

Analytical 03 - Memory Hierarchy

This assignment was about solving problems related to memory hierarchy, such as calculating hits and misses during the execution of a code or calculating the average memory access time. It aimed to deepen the understanding of cache memory, its role in program execution, and the choices and trade-offs involved in designing and configuring cache hierarchies.

Analytical 04 - Virtual Memory

This assignment was about solving problems related to virtual memory, such as designing the page table and calculating hits and misses in the TLB when performing memory accesses. It also assessed the impact of different page sizes on memory efficiency, while exploring various scenarios related to memory management, including single-level page tables and multi-level page tables.

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Assembly MIPS - Pipelined Datapath - Memory Hierarchy - Virtual Memory | Computer Architecture at ECE NTUA

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