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Working from home
HW-SW co-design of high-performance embedded SoCs (RISC-V, hardware accelerators, FPGAs)
- Italy
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16:27
(UTC +01:00) - https://orcid.org/0000-0002-7420-6496
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dummy_vip
dummy_vip PublicForked from pulp-training/dummy_vip
Files for the IP Integration Exercise
SystemVerilog
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pulpissimo
pulpissimo PublicForked from pulp-platform/pulpissimo
This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.
C++
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