This simulator is a tool for students to learn the inner workings of a CPU. It is based on the RISC-V instruction set architecture (RV32I) and provides a visual step by step guide through a CPU. Watch the introduction video!
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- Step by step guid through the CPU
- See the current instruction and what that instruction does
- Information about each element and signal of the CPU
- See all registers, memory
- Run examples
- Compile your own code with integrated editor and compiler
- Complex CPU elements simplified
- Not focused on speed, verification, completeness or correct depiction of HDL but on principles of teaching
- Runs on electron
- Visualisation with three.js and SVGLoader
- Interface with Angular
- Custom JavaScript ELF parser
- Custom JavaScript instruction decoder
- Custom JavaScript CPU based RV32I ISA
Thank you to @jameslzhu for RISC V Reference Sheet, and @anvaka for three.map.control. Other used packages are in the packages.json.