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Figure out how to get the verilator / iverilog simulation working with fupy. #12

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mithro opened this issue Aug 13, 2017 · 0 comments
Open

Figure out how to get the verilator / iverilog simulation working with fupy. #12

mithro opened this issue Aug 13, 2017 · 0 comments
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enhancement help wanted

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mithro commented Aug 13, 2017

LiteX supports using verilator and iverilog for simulation of FPGA gateware. It would be good to get this working to allow people to do some gateware + micropython development without needing real hardware
@mithro mithro changed the title Figure out how to get the verilator / iverilog simulation working with upy-fpga. Figure out how to get the verilator / iverilog simulation working with fupy. Aug 8, 2019
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