-fno-delayed-branch generates delay slots in .plt section

[kolerov]

There is an option -fno-delayed-branch which turns off generating instructions for delay slots. However, it still generates instructions with delay slots in several places like .plt section (is it the only place?). Here is an example for HS3x/4x:

$ arc-linux-gnu-gcc -fno-delayed-branch -g -O2 main.c -o main.elf
$ arc-linux-gnu-objdump -d main.elf

main.elf:     file format elf32-littlearc


Disassembly of section .init:

00010280 <_init-0x4>:
   10280:       0000 0000               b       0       ;10280 <__abi_tag+0x114>

00010284 <_init>:
   10284:       c0f1                    push_s  blink
   10286:       c0d1                    pop_s   blink
   10288:       7ee0                    j_s     [blink]

Disassembly of section .plt:

0001028c <.plt>:
   1028c:       1600 700b 0001 4000     ld      r11,[0x14000]
   10294:       1600 700a 0001 4004     ld      r10,[0x14004]
   1029c:       2020 0280               j       [r10]
   102a0:       3ffc 0001               .word   0x3ffc0001
        ...
   102ac:       2730 7f8c 0000 3d5c     ld      r12,[pcl,0x3d5c]        ;14008 <__libc_start_main@GLIBC_2.34>
   102b4:       2021 0300               j.d     [r12]
   102b8:       240a 1fc0               mov     r12,pcl
   102bc:       2730 7f8c 0000 3d50     ld      r12,[pcl,0x3d50]        ;1400c <puts@GLIBC_2.32>
   102c4:       2021 0300               j.d     [r12]
   102c8:       240a 1fc0               mov     r12,pcl

Disassembly of section .text:

000102cc <main>:
   102cc:       c0f1                    push_s  blink
   102ce:       40c3 0001 0390          mov_s   r0,0x10390
   102d4:       0fea ffcf               bl      -24     ;102bc <.plt+0x30>
   102d8:       700c                    mov_s   r0,0
   102da:       c0d1                    pop_s   blink
   102dc:       7ee0                    j_s     [blink]
   102de:       78e0                    nop_s

...