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Author: fhahn

llvm/lib/Analysis/ScalarEvolution.cpp

@@ -15581,6 +15581,7 @@ void ScalarEvolution::LoopGuards::collectFromBlock(
       Predicate = CmpInst::getSwappedPredicate(Predicate);
     }
 
+    unsigned StartSize = RewriteMap.size();
     // Check for a condition of the form (-C1 + X < C2).  InstCombine will
     // create this form when combining two checks of the form (X u< C2 + C1) and
     // (X >=u C1).
@@ -15931,6 +15932,7 @@ void ScalarEvolution::LoopGuards::collectFromBlock(
   // Guards.RewriteMap. Conditions are processed in reverse order, so the
   // earliest conditions is processed first. This ensures the SCEVs with the
   // shortest dependency chains are constructed first.
+  SmallVector<std::tuple<CmpInst::Predicate, const SCEV *, const SCEV *>> ToProcess;
   for (auto [Term, EnterIfTrue] : reverse(Terms)) {
     SmallVector<Value *, 8> Worklist;
     SmallPtrSet<Value *, 8> Visited;
@@ -15945,7 +15947,9 @@ void ScalarEvolution::LoopGuards::collectFromBlock(
             EnterIfTrue ? Cmp->getPredicate() : Cmp->getInversePredicate();
         const auto *LHS = SE.getSCEV(Cmp->getOperand(0));
         const auto *RHS = SE.getSCEV(Cmp->getOperand(1));
-        CollectCondition(Predicate, LHS, RHS, Guards.RewriteMap);
+//        dbgs() << "\n" << *Cmp << "\n";
+
+        ToProcess.emplace_back(Predicate, LHS, RHS);
         continue;
       }
 
@@ -15958,6 +15962,31 @@ void ScalarEvolution::LoopGuards::collectFromBlock(
     }
   }
 
+  ToProcess = to_vector(ToProcess);
+    sort(ToProcess, [&](const auto &A, const auto &B) {
+
+         const SCEV *X, *Y;
+         const auto &[APred, ALHS , ARHS] = A;
+         const auto &[BPred, BLHS , BRHS] = B;
+         bool AIsDiv = SE.matchURem(ALHS, X, Y) && ARHS->isZero();
+         bool BIsDiv = SE.matchURem(BLHS, X, Y) && BRHS->isZero();
+         return BIsDiv < AIsDiv;
+         /*bool AConst = isa<SCEVConstant>(ARHS);*/
+        /*// bool AEq = !(APred == CmpInst::ICMP_EQ || APred == CmpInst::ICMP_NE);*/
+         /*bool BConst = isa<SCEVConstant>(BRHS);*/
+         /*//bool BEq = !(BPred == CmpInst::ICMP_EQ || BPred == CmpInst::ICMP_NE);*/
+         /*return std::tie(AConst)  < std::tie(BConst);*/
+         });
+    for (const auto &[Predicate, LHS, RHS]: ToProcess) {
+        CollectCondition(Predicate, LHS, RHS, Guards.RewriteMap);
+    }
+
+/*    for (const auto &[Predicate, LHS, RHS]: reverse(ToProcess)) {*/
+        /*CollectCondition(Predicate, LHS, RHS, Guards.RewriteMap);*/
+    /*}*/
+
+
+
   // Let the rewriter preserve NUW/NSW flags if the unsigned/signed ranges of
   // the replacement expressions are contained in the ranges of the replaced
   // expressions.
@@ -16096,6 +16125,11 @@ const SCEV *ScalarEvolution::LoopGuards::rewrite(const SCEV *Expr) const {
   if (RewriteMap.empty())
     return Expr;
 
+/*  dbgs() << "RWM\n";*/
+  /*for (const auto &[From, To] : RewriteMap) {*/
+    /*dbgs() << "From " << *From << " to " << *To << "\n";*/
+    
+  /*}*/
   SCEVLoopGuardRewriter Rewriter(SE, *this);
   return Rewriter.visit(Expr);
 }

llvm/test/Transforms/LoopUnroll/peel-last-iteration-with-guards.ll

@@ -79,22 +79,22 @@ define i32 @peel_with_guard_known_nonnegative_2(ptr %x, i32 %w) {
 ; CHECK-NEXT:    [[WIDE_TRIP_COUNT:%.*]] = zext nneg i32 [[W]] to i64
 ; CHECK-NEXT:    br label %[[LOOP_HEADER:.*]]
 ; CHECK:       [[LOOP_HEADER]]:
-; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
-; CHECK-NEXT:    [[RED:%.*]] = phi i32 [ 0, %[[PH]] ], [ [[ADD:%.*]], %[[LOOP_LATCH]] ]
-; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i64 [[IV]], [[TMP0]]
-; CHECK-NEXT:    br i1 [[CMP1]], label %[[IF_THEN:.*]], label %[[LOOP_LATCH]]
+; CHECK-NEXT:    [[TMP5:%.*]] = phi i64 [ 0, %[[PH]] ], [ [[IV_NEXT_PEEL:%.*]], %[[LOOP_LATCH:.*]] ]
+; CHECK-NEXT:    [[TMP6:%.*]] = phi i32 [ 0, %[[PH]] ], [ [[ADD_PEEL:%.*]], %[[LOOP_LATCH]] ]
+; CHECK-NEXT:    [[CMP1_PEEL:%.*]] = icmp eq i64 [[TMP5]], [[TMP0]]
+; CHECK-NEXT:    br i1 [[CMP1_PEEL]], label %[[IF_THEN:.*]], label %[[LOOP_LATCH]]
 ; CHECK:       [[IF_THEN]]:
 ; CHECK-NEXT:    tail call void @foo()
 ; CHECK-NEXT:    br label %[[LOOP_LATCH]]
 ; CHECK:       [[LOOP_LATCH]]:
-; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr [[X]], i64 [[IV]]
-; CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
-; CHECK-NEXT:    [[ADD]] = add nsw i32 [[TMP1]], [[RED]]
-; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
-; CHECK-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[WIDE_TRIP_COUNT]]
-; CHECK-NEXT:    br i1 [[EC]], label %[[EXIT_LOOPEXIT:.*]], label %[[LOOP_HEADER]]
+; CHECK-NEXT:    [[ARRAYIDX_PEEL:%.*]] = getelementptr inbounds nuw i32, ptr [[X]], i64 [[TMP5]]
+; CHECK-NEXT:    [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX_PEEL]], align 4
+; CHECK-NEXT:    [[ADD_PEEL]] = add nsw i32 [[TMP7]], [[TMP6]]
+; CHECK-NEXT:    [[IV_NEXT_PEEL]] = add nuw nsw i64 [[TMP5]], 1
+; CHECK-NEXT:    [[EC_PEEL:%.*]] = icmp eq i64 [[IV_NEXT_PEEL]], [[WIDE_TRIP_COUNT]]
+; CHECK-NEXT:    br i1 [[EC_PEEL]], label %[[EXIT_LOOPEXIT:.*]], label %[[LOOP_HEADER]]
 ; CHECK:       [[EXIT_LOOPEXIT]]:
-; CHECK-NEXT:    [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD]], %[[LOOP_LATCH]] ]
+; CHECK-NEXT:    [[ADD_LCSSA:%.*]] = phi i32 [ [[ADD_PEEL]], %[[LOOP_LATCH]] ]
 ; CHECK-NEXT:    br label %[[EXIT]]
 ; CHECK:       [[EXIT]]:
 ; CHECK-NEXT:    [[RED_LCSSA:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[ADD_LCSSA]], %[[EXIT_LOOPEXIT]] ]