diff --git a/P1AM/P1AM.py b/P1AM/P1AM.py index cd3f97f..15d3df5 100644 --- a/P1AM/P1AM.py +++ b/P1AM/P1AM.py @@ -5,9 +5,7 @@ `P1AM` ================================================================================ -Library to interface with P1000 modules using a P1AM-200. - -* Author(s): Adam Cummick, Tristan Warder, Michael Scott +Library to interface with Productivity1000 modules. """ import time @@ -23,7 +21,7 @@ __repo__ = "https://github.com/facts-engineering/CircuitPython_P1AM.git" def change_bit(original, bit, state): - """Change value of sepcific bit position""" + """Change value of specific bit position""" if state: return original | (1 << bit) @@ -86,19 +84,24 @@ def read_block(length: int, offset: int, block_type: int): _p1.write(msg) if _spi_timeout(): with BC_SPI as _p1: + time.sleep(0.00001) _p1.readinto(data_buf, start=0, end=length) _data_sync() data = int.from_bytes(data_buf[0:length], byte_order) return data - return False # no respsonse + raise RuntimeError( + "Check External Supply Connection\nNo Base Controller Activity" + ) def _data_sync(timeout=0.2): - """Wait for Base Contorller to update data""" + """Wait for Base Controller to update data""" start = time.monotonic() + power_lost = 0 while not ACK.value: if time.monotonic() - start > timeout: + power_lost += 1 break start = time.monotonic() @@ -109,8 +112,14 @@ def _data_sync(timeout=0.2): start = time.monotonic() while not ACK.value: if time.monotonic() - start > timeout: + power_lost += 1 break + if power_lost == 2: + raise RuntimeError( + "Check External Supply Connection\nNo Base Controller Activity" + ) + def _spi_timeout(timeout=0.200): """Wait for Base Controller to be ready for next transaction""" @@ -1003,7 +1012,7 @@ def init(self): # pylint: disable=too-many-locals, too-many-statements if _spi_timeout(5) is False: raise RuntimeError( - "Check External Supply Connection\n" "No Base Controller Activity" + "Check External Supply Connection\nNo Base Controller Activity" ) while (slots == 0 or slots > 15) and retry < 5: diff --git a/examples/discrete_output.py b/examples/discrete_output.py index 6e61aba..50d3352 100644 --- a/examples/discrete_output.py +++ b/examples/discrete_output.py @@ -30,7 +30,7 @@ base = P1AM.Base() # Intializes base. Returns the base object. module = base[1] # module object for slot 1 output = module[2] # 2nd channel object for our output module. -# output = module.outputs[2] # on combos select inputs with module.outputs +# output = module.outputs[2] # on combos select outputs with module.outputs while True: output.value = True diff --git a/examples/power_cycle.py b/examples/power_cycle.py new file mode 100644 index 0000000..a37c891 --- /dev/null +++ b/examples/power_cycle.py @@ -0,0 +1,48 @@ +""" + Example: Power Cycle + + + This example shows how to re-init the base after power has been cycled. + + When powering your device with both USB and external power, this example can + be used to catch and handle errors produced by a temporary loss of external 24V. + + This example uses a discrete output module, but can be adapted to other modules. + _____ _____ + | P || S | + | 1 || L | + | A || O | + | M || T | + | - || | + | 2 || 0 | + | 0 || 1 | + | 0 || | + ¯¯¯¯¯ ¯¯¯¯¯ + Written by FACTS Engineering + Copyright (c) 2023 FACTS Engineering, LLC + Licensed under the MIT license. +""" + +import time +import P1AM + +base = P1AM.Base() # Intializes base. Returns the base object. +module = base[1] # module object for slot 1 +output = module[2] # 2nd channel object for our output module. +# output = module.outputs[2] # on combos select outputs with module.outputs + +while True: + try: + # removing external 24V here will raise a RuntimeError + output.value = True + time.sleep(1) + output.value = False + time.sleep(1) + except RuntimeError: + while True: + # loop until base is re-initialized + try: + base.init() # must be called if external 24V is interrupted + break + except RuntimeError: + pass \ No newline at end of file diff --git a/pyproject.toml b/pyproject.toml index de49045..16b2c76 100644 --- a/pyproject.toml +++ b/pyproject.toml @@ -13,7 +13,7 @@ readme = "README.md" authors = [ {name = "Adam Cummick", email = "adamc@facts-eng.com"} ] -urls = {Homepage = "https://github.com/facts-engineering/CircuitPython_P1AM.git"} +urls = {Homepage = "https://github.com/facts-engineering/CircuitPython_P1AM"} keywords = [ "adafruit", "circuitpython",