AArch64: Allow rebasing pointers to make more use of stp/ldp #9678
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We sometimes see sequences like this: store %123(...b), [addr + 8] store %124(...q), [addr] The existing storepair simplify code requires that the stored registers be physical GP registers, presumably because the lowering for storepair/storepairl cannot handle FP/SIMD regs. However, during register allocation we materialise these constants and end up with the sequence: ldimmb ... => x0 store x0, [addr + 8] ldimmq ... => x0 store x0, [addr] which then makes it very difficult to combine these into storepairs in the post-regalloc simplify pass. This PR permits combining pairs of stores prior to regalloc, provided we can show they are either: 1. A GP physical register, or 2. An integer constant that will be materialised into a GP reg.
If the disp (offset) in a Vptr is negative and outside the range of stp/ldp, then it's also outside the range of str/stur/ldr/ldur. This will force the offset to be materialised in a register and to then use the reg+reg addressing mode for the loads and stores. We'll end up with assembly like this: mov x2, -1024 str x0, [x29, x2] mov x2, -1032 str x1, [x29, x2] If the immediate can easily be encoded into an add or sub instruction, then we can rebase the pointer and it will still be worth it. We'll then end up with assembly like this: add x2, x29, -1024 stp x0, x1, [x2] which still saves two instructions.
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NOTE: This PR includes #9676, so should probably wait for that to land first. |
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If the disp (offset) in a Vptr is negative and outside the range
of stp/ldp, then it's also outside the range of
str/stur/ldr/ldur. This will force the offset to be materialised
in a register and to then use the reg+reg addressing mode for
the loads and stores. We'll end up with assembly like this:
mov x2, -1024
str x0, [x29, x2]
mov x2, -1032
str x1, [x29, x2]
If the immediate can easily be encoded into an add or sub
instruction, then we can rebase the pointer and it will still be
worth it. We'll then end up with assembly like this:
add x2, x29, -1024
stp x0, x1, [x2]
which still saves two instructions.