-
Notifications
You must be signed in to change notification settings - Fork 7.4k
/
Copy pathledc.c
1600 lines (1466 loc) · 71.9 KB
/
ledc.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <string.h>
#include <sys/param.h>
#include "esp_types.h"
#include "freertos/FreeRTOS.h"
#include "freertos/semphr.h"
#include "freertos/idf_additions.h"
#include "esp_log.h"
#include "esp_check.h"
#include "soc/ledc_periph.h"
#include "esp_clk_tree.h"
#include "soc/soc_caps.h"
#include "hal/ledc_hal.h"
#include "hal/gpio_hal.h"
#include "driver/ledc.h"
#include "esp_rom_gpio.h"
#include "clk_ctrl_os.h"
#include "esp_private/esp_sleep_internal.h"
#include "esp_private/periph_ctrl.h"
#include "esp_private/gpio.h"
#include "esp_private/esp_clk_tree_common.h"
#include "esp_private/esp_gpio_reserve.h"
#include "esp_memory_utils.h"
static __attribute__((unused)) const char *LEDC_TAG = "ledc";
#define LEDC_CHECK(a, str, ret_val) ESP_RETURN_ON_FALSE(a, ret_val, LEDC_TAG, "%s", str)
#define LEDC_ARG_CHECK(a, param) ESP_RETURN_ON_FALSE(a, ESP_ERR_INVALID_ARG, LEDC_TAG, param " argument is invalid")
#define LEDC_CHECK_ISR(a, str, ret_val) ESP_RETURN_ON_FALSE_ISR(a, ret_val, LEDC_TAG, "%s", str)
#define LEDC_ARG_CHECK_ISR(a, param) ESP_RETURN_ON_FALSE_ISR(a, ESP_ERR_INVALID_ARG, LEDC_TAG, param " argument is invalid")
#define LEDC_CLK_NOT_FOUND 0
#define LEDC_SLOW_CLK_UNINIT -1
#define LEDC_TIMER_SPECIFIC_CLK_UNINIT -1
// Precision degree only affects RC_FAST, other clock sources' frequencies are fixed values
// For targets that do not support RC_FAST calibration, can only use its approx. value. Precision degree other than
// APPROX will trigger LOGW during the call to `esp_clk_tree_src_get_freq_hz`.
#if SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
#define LEDC_CLK_SRC_FREQ_PRECISION ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED
#else
#define LEDC_CLK_SRC_FREQ_PRECISION ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX
#endif
#if !SOC_RCC_IS_INDEPENDENT
#define LEDC_BUS_CLOCK_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define LEDC_BUS_CLOCK_ATOMIC()
#endif
#if SOC_PERIPH_CLK_CTRL_SHARED
#define LEDC_FUNC_CLOCK_ATOMIC() PERIPH_RCC_ATOMIC()
#else
#define LEDC_FUNC_CLOCK_ATOMIC()
#endif
typedef enum {
LEDC_FSM_IDLE,
LEDC_FSM_HW_FADE,
LEDC_FSM_ISR_CAL,
LEDC_FSM_KILLED_PENDING,
} ledc_fade_fsm_t;
typedef struct {
ledc_mode_t speed_mode;
ledc_duty_direction_t direction;
uint32_t target_duty;
int cycle_num;
int scale;
ledc_fade_mode_t mode;
SemaphoreHandle_t ledc_fade_sem;
SemaphoreHandle_t ledc_fade_mux;
ledc_cb_t ledc_fade_callback;
void *cb_user_arg;
volatile ledc_fade_fsm_t fsm;
} ledc_fade_t;
typedef struct {
ledc_hal_context_t ledc_hal; /*!< LEDC hal context */
ledc_slow_clk_sel_t glb_clk; /*!< LEDC global clock selection */
bool timer_is_stopped[LEDC_TIMER_MAX]; /*!< Indicates whether each timer has been stopped */
bool glb_clk_is_acquired[LEDC_TIMER_MAX]; /*!< Tracks whether the global clock is being acquired by each timer */
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
ledc_clk_src_t timer_specific_clk[LEDC_TIMER_MAX]; /*!< Tracks the timer-specific clock selection for each timer */
#endif
} ledc_obj_t;
static ledc_obj_t *p_ledc_obj[LEDC_SPEED_MODE_MAX] = {
[0 ... LEDC_SPEED_MODE_MAX - 1] = NULL,
};
static ledc_fade_t *s_ledc_fade_rec[LEDC_SPEED_MODE_MAX][LEDC_CHANNEL_MAX];
static ledc_isr_handle_t s_ledc_fade_isr_handle = NULL;
static portMUX_TYPE ledc_spinlock = portMUX_INITIALIZER_UNLOCKED;
static _lock_t s_ledc_mutex[LEDC_SPEED_MODE_MAX];
#define LEDC_VAL_NO_CHANGE (-1)
#define LEDC_DUTY_NUM_MAX LEDC_LL_DUTY_NUM_MAX // Maximum steps per hardware fade
#define LEDC_DUTY_DECIMAL_BIT_NUM (4)
#define LEDC_TIMER_DIV_NUM_MAX (0x3FFFF)
#define LEDC_FADE_TOO_SLOW_STR "LEDC FADE TOO SLOW"
#define LEDC_FADE_TOO_FAST_STR "LEDC FADE TOO FAST"
#define DIM(array) (sizeof(array)/sizeof(*array))
#define LEDC_IS_DIV_INVALID(div) ((div) <= LEDC_LL_FRACTIONAL_MAX || (div) > LEDC_TIMER_DIV_NUM_MAX)
static __attribute__((unused)) const char *LEDC_NOT_INIT = "LEDC is not initialized";
static __attribute__((unused)) const char *LEDC_FADE_SERVICE_ERR_STR = "LEDC fade service not installed";
static __attribute__((unused)) const char *LEDC_FADE_INIT_ERROR_STR = "LEDC fade channel init error, not enough memory or service not installed";
//This value will be calibrated when in use.
static uint32_t s_ledc_slow_clk_rc_fast_freq = 0;
static const ledc_slow_clk_sel_t s_glb_clks[] = LEDC_LL_GLOBAL_CLOCKS;
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
static const ledc_clk_src_t s_timer_specific_clks[] = LEDC_LL_TIMER_SPECIFIC_CLOCKS;
#endif
static void ledc_ls_timer_update(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
{
if (speed_mode == LEDC_LOW_SPEED_MODE) {
ledc_hal_ls_timer_update(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel);
}
}
static IRAM_ATTR void ledc_ls_channel_update(ledc_mode_t speed_mode, ledc_channel_t channel)
{
if (speed_mode == LEDC_LOW_SPEED_MODE) {
ledc_hal_ls_channel_update(&(p_ledc_obj[speed_mode]->ledc_hal), channel);
}
}
//We know that RC_FAST is about 8M/20M, but don't know the actual value. So we need to do a calibration.
static bool ledc_slow_clk_calibrate(void)
{
if (periph_rtc_dig_clk8m_enable()) {
s_ledc_slow_clk_rc_fast_freq = periph_rtc_dig_clk8m_get_freq();
#if !SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
/* Workaround: RC_FAST calibration cannot be performed, we can only use its theoretic freq */
ESP_LOGD(LEDC_TAG, "Calibration cannot be performed, approximate RC_FAST_CLK : %"PRIu32" Hz", s_ledc_slow_clk_rc_fast_freq);
#else
ESP_LOGD(LEDC_TAG, "Calibrate RC_FAST_CLK : %"PRIu32" Hz", s_ledc_slow_clk_rc_fast_freq);
#endif
return true;
}
ESP_LOGE(LEDC_TAG, "Calibrate RC_FAST_CLK failed");
return false;
}
static esp_err_t ledc_enable_intr_type(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_intr_type_t type)
{
if (type == LEDC_INTR_FADE_END) {
ledc_hal_set_fade_end_intr(&(p_ledc_obj[speed_mode]->ledc_hal), channel, true);
} else {
ledc_hal_set_fade_end_intr(&(p_ledc_obj[speed_mode]->ledc_hal), channel, false);
}
return ESP_OK;
}
static void _ledc_fade_hw_acquire(ledc_mode_t mode, ledc_channel_t channel)
{
ledc_fade_t *fade = s_ledc_fade_rec[mode][channel];
if (fade) {
xSemaphoreTake(fade->ledc_fade_sem, portMAX_DELAY);
portENTER_CRITICAL(&ledc_spinlock);
ledc_enable_intr_type(mode, channel, LEDC_INTR_DISABLE);
portEXIT_CRITICAL(&ledc_spinlock);
}
}
static void _ledc_fade_hw_release(ledc_mode_t mode, ledc_channel_t channel)
{
ledc_fade_t *fade = s_ledc_fade_rec[mode][channel];
if (fade) {
xSemaphoreGive(fade->ledc_fade_sem);
}
}
static void _ledc_op_lock_acquire(ledc_mode_t mode, ledc_channel_t channel)
{
ledc_fade_t *fade = s_ledc_fade_rec[mode][channel];
if (fade) {
xSemaphoreTake(fade->ledc_fade_mux, portMAX_DELAY);
}
}
static void _ledc_op_lock_release(ledc_mode_t mode, ledc_channel_t channel)
{
ledc_fade_t *fade = s_ledc_fade_rec[mode][channel];
if (fade) {
xSemaphoreGive(fade->ledc_fade_mux);
}
}
static uint32_t ledc_get_max_duty(ledc_mode_t speed_mode, ledc_channel_t channel)
{
// The arguments are checked before internally calling this function.
ledc_timer_t timer_sel;
ledc_hal_get_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &timer_sel);
uint32_t max_duty;
ledc_hal_get_max_duty(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel, &max_duty);
return max_duty;
}
esp_err_t ledc_timer_set(ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t clock_divider, uint32_t duty_resolution,
ledc_clk_src_t clk_src)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(timer_sel < LEDC_TIMER_MAX, "timer_select");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL(&ledc_spinlock);
ledc_hal_set_clock_divider(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel, clock_divider);
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
/* Clock source can only be configured on targets which support timer-specific source clock. */
ledc_hal_set_clock_source(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel, clk_src);
// TODO: acquire clk_src, and release old clk_src if initialized and different than new one [clk_tree]
p_ledc_obj[speed_mode]->timer_specific_clk[timer_sel] = clk_src;
#endif
ledc_hal_set_duty_resolution(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel, duty_resolution);
ledc_ls_timer_update(speed_mode, timer_sel);
portEXIT_CRITICAL(&ledc_spinlock);
return ESP_OK;
}
static IRAM_ATTR esp_err_t ledc_duty_config(ledc_mode_t speed_mode, ledc_channel_t channel, int hpoint_val,
int duty_val, ledc_duty_direction_t duty_direction, uint32_t duty_num, uint32_t duty_cycle, uint32_t duty_scale)
{
if (hpoint_val >= 0) {
ledc_hal_set_hpoint(&(p_ledc_obj[speed_mode]->ledc_hal), channel, hpoint_val);
}
if (duty_val >= 0) {
ledc_hal_set_duty_int_part(&(p_ledc_obj[speed_mode]->ledc_hal), channel, duty_val);
}
ledc_hal_set_fade_param(&(p_ledc_obj[speed_mode]->ledc_hal), channel, 0, duty_direction, duty_cycle, duty_scale, duty_num);
#if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
ledc_hal_set_range_number(&(p_ledc_obj[speed_mode]->ledc_hal), channel, 1);
#endif
return ESP_OK;
}
esp_err_t ledc_bind_channel_timer(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_timer_t timer_sel)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(timer_sel < LEDC_TIMER_MAX, "timer_select");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL(&ledc_spinlock);
ledc_hal_bind_channel_timer(&(p_ledc_obj[speed_mode]->ledc_hal), channel, timer_sel);
ledc_ls_channel_update(speed_mode, channel);
portEXIT_CRITICAL(&ledc_spinlock);
return ESP_OK;
}
esp_err_t ledc_timer_rst(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(timer_sel < LEDC_TIMER_MAX, "timer_select");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL(&ledc_spinlock);
ledc_hal_timer_rst(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel);
portEXIT_CRITICAL(&ledc_spinlock);
return ESP_OK;
}
esp_err_t ledc_timer_pause(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(timer_sel < LEDC_TIMER_MAX, "timer_select");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL(&ledc_spinlock);
p_ledc_obj[speed_mode]->timer_is_stopped[timer_sel] = true;
ledc_hal_timer_pause(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel);
portEXIT_CRITICAL(&ledc_spinlock);
return ESP_OK;
}
esp_err_t ledc_timer_resume(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(timer_sel < LEDC_TIMER_MAX, "timer_select");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL(&ledc_spinlock);
p_ledc_obj[speed_mode]->timer_is_stopped[timer_sel] = false;
ledc_hal_timer_resume(&(p_ledc_obj[speed_mode]->ledc_hal), timer_sel);
portEXIT_CRITICAL(&ledc_spinlock);
return ESP_OK;
}
esp_err_t ledc_isr_register(void (*fn)(void *), void *arg, int intr_alloc_flags, ledc_isr_handle_t *handle)
{
esp_err_t ret;
LEDC_ARG_CHECK(fn, "fn");
portENTER_CRITICAL(&ledc_spinlock);
ret = esp_intr_alloc(ETS_LEDC_INTR_SOURCE, intr_alloc_flags, fn, arg, handle);
portEXIT_CRITICAL(&ledc_spinlock);
return ret;
}
static bool ledc_speed_mode_ctx_create(ledc_mode_t speed_mode)
{
bool new_ctx = false;
// Prevent p_ledc_obj malloc concurrently
_lock_acquire(&s_ledc_mutex[speed_mode]);
if (!p_ledc_obj[speed_mode]) {
ledc_obj_t *ledc_new_mode_obj = (ledc_obj_t *) heap_caps_calloc(1, sizeof(ledc_obj_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
if (ledc_new_mode_obj) {
new_ctx = true;
LEDC_BUS_CLOCK_ATOMIC() {
ledc_ll_enable_bus_clock(true);
ledc_ll_enable_reset_reg(false);
}
ledc_hal_init(&(ledc_new_mode_obj->ledc_hal), speed_mode);
ledc_new_mode_obj->glb_clk = LEDC_SLOW_CLK_UNINIT;
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
memset(ledc_new_mode_obj->timer_specific_clk, LEDC_TIMER_SPECIFIC_CLK_UNINIT, sizeof(ledc_clk_src_t) * LEDC_TIMER_MAX);
#endif
p_ledc_obj[speed_mode] = ledc_new_mode_obj;
}
}
_lock_release(&s_ledc_mutex[speed_mode]);
return new_ctx;
}
static inline uint32_t ledc_calculate_divisor(uint32_t src_clk_freq, int freq_hz, uint32_t precision)
{
/**
* In order to find the right divisor, we need to divide the source clock
* frequency by the desired frequency. However, two things to note here:
* - The lowest LEDC_LL_FRACTIONAL_BITS bits of the result are the FRACTIONAL
* part. The higher bits represent the integer part, this is why we need
* to right shift the source frequency.
* - The `precision` parameter represents the granularity of the clock. It
* **must** be a power of 2. It means that the resulted divisor is
* a multiplier of `precision`.
*
* Let's take a concrete example, we need to generate a 5KHz clock out of
* a 80MHz clock (APB).
* If the precision is 1024 (10 bits), the resulted multiplier is:
* (80000000 << 8) / (5000 * 1024) = 4000 (0xfa0)
* Let's ignore the fractional part to simplify the explanation, so we get
* a result of 15 (0xf).
* This can be interpreted as: every 15 "precision" ticks, the resulted
* clock will go high, where one precision tick is made out of 1024 source
* clock ticks.
* Thus, every `15 * 1024` source clock ticks, the resulted clock will go
* high.
*
* NOTE: We are also going to round up the value when necessary, thanks to:
* (freq_hz * precision / 2)
*/
return (((uint64_t) src_clk_freq << LEDC_LL_FRACTIONAL_BITS) + freq_hz * precision / 2)
/ (freq_hz * precision);
}
static inline uint32_t ledc_auto_global_clk_divisor(int freq_hz, uint32_t precision, ledc_slow_clk_sel_t *clk_target)
{
uint32_t ret = LEDC_CLK_NOT_FOUND;
uint32_t clk_freq = 0;
/* This function will go through all the following clock sources to look
* for a valid divisor which generates the requested frequency. */
for (int i = 0; i < DIM(s_glb_clks); i++) {
/* Before calculating the divisor, we need to have the RC_FAST frequency.
* If it hasn't been measured yet, try calibrating it now. */
if (s_glb_clks[i] == LEDC_SLOW_CLK_RC_FAST && s_ledc_slow_clk_rc_fast_freq == 0 && !ledc_slow_clk_calibrate()) {
ESP_LOGD(LEDC_TAG, "Unable to retrieve RC_FAST clock frequency, skipping it");
continue;
}
esp_clk_tree_src_get_freq_hz((soc_module_clk_t)s_glb_clks[i], LEDC_CLK_SRC_FREQ_PRECISION, &clk_freq);
uint32_t div_param = ledc_calculate_divisor(clk_freq, freq_hz, precision);
/* If the divisor is valid, we can return this value. */
if (!LEDC_IS_DIV_INVALID(div_param)) {
*clk_target = s_glb_clks[i];
ret = div_param;
break;
}
}
return ret;
}
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
static inline uint32_t ledc_auto_timer_specific_clk_divisor(ledc_mode_t speed_mode, int freq_hz, uint32_t precision,
ledc_clk_src_t *clk_source)
{
uint32_t ret = LEDC_CLK_NOT_FOUND;
uint32_t clk_freq = 0;
for (int i = 0; i < DIM(s_timer_specific_clks); i++) {
esp_clk_tree_src_get_freq_hz((soc_module_clk_t)s_timer_specific_clks[i], LEDC_CLK_SRC_FREQ_PRECISION, &clk_freq);
uint32_t div_param = ledc_calculate_divisor(clk_freq, freq_hz, precision);
/* If the divisor is valid, we can return this value. */
if (!LEDC_IS_DIV_INVALID(div_param)) {
*clk_source = s_timer_specific_clks[i];
ret = div_param;
break;
}
}
#if SOC_LEDC_SUPPORT_HS_MODE
/* On board that support LEDC high-speed mode, APB clock becomes a timer-
* specific clock when in high speed mode. Check if it is necessary here
* to test APB. */
if (speed_mode == LEDC_HIGH_SPEED_MODE && ret == LEDC_CLK_NOT_FOUND) {
/* No divider was found yet, try with APB! */
esp_clk_tree_src_get_freq_hz((soc_module_clk_t)LEDC_APB_CLK, LEDC_CLK_SRC_FREQ_PRECISION, &clk_freq);
uint32_t div_param = ledc_calculate_divisor(clk_freq, freq_hz, precision);
if (!LEDC_IS_DIV_INVALID(div_param)) {
*clk_source = LEDC_APB_CLK;
ret = div_param;
}
}
#endif
return ret;
}
#endif
/**
* @brief Try to find the clock with its divisor giving the frequency requested
* by the caller.
*/
static uint32_t ledc_auto_clk_divisor(ledc_mode_t speed_mode, int freq_hz, uint32_t precision,
ledc_clk_src_t *clk_source, ledc_slow_clk_sel_t *clk_target)
{
uint32_t ret = LEDC_CLK_NOT_FOUND;
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
/* If the SoC presents timer-specific clock(s), try to achieve the given frequency
* thanks to it/them.
* clk_source parameter will returned by this function. */
uint32_t div_param_timer = ledc_auto_timer_specific_clk_divisor(speed_mode, freq_hz, precision, clk_source);
if (div_param_timer != LEDC_CLK_NOT_FOUND) {
/* The divider is valid, no need try any other clock, return directly. */
ret = div_param_timer;
}
#endif
/* On ESP32, only low speed channel can use the global clocks. For other
* chips, there are no high speed channels. */
if (ret == LEDC_CLK_NOT_FOUND && speed_mode == LEDC_LOW_SPEED_MODE) {
uint32_t div_param_global = ledc_auto_global_clk_divisor(freq_hz, precision, clk_target);
if (div_param_global != LEDC_CLK_NOT_FOUND) {
*clk_source = LEDC_SCLK;
ret = div_param_global;
}
}
return ret;
}
/**
* @brief Function setting the LEDC timer divisor with the given source clock,
* frequency and resolution. If the clock configuration passed is
* LEDC_AUTO_CLK, the clock will be determined automatically (if possible).
*/
static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_num, ledc_clk_cfg_t clk_cfg, int freq_hz, int duty_resolution)
{
uint32_t div_param = 0;
const uint32_t precision = (0x1 << duty_resolution);
/* The clock sources are not initialized on purpose. To produce compiler warning if used but the selector functions
* don't set them properly. */
/* Timer-specific mux. Set to timer-specific clock or LEDC_SCLK if a global clock is used. */
ledc_clk_src_t timer_clk_src;
/* Global clock mux. Should be set when LEDC_SCLK is used in LOW_SPEED_MODE. Otherwise left uninitialized. */
ledc_slow_clk_sel_t glb_clk = LEDC_SLOW_CLK_UNINIT;
if (clk_cfg == LEDC_AUTO_CLK) {
/* User hasn't specified the speed, we should try to guess it. */
div_param = ledc_auto_clk_divisor(speed_mode, freq_hz, precision, &timer_clk_src, &glb_clk);
} else if (clk_cfg == LEDC_USE_RC_FAST_CLK) {
/* User specified source clock(RC_FAST_CLK) for low speed channel.
* Make sure the speed mode is correct. */
ESP_RETURN_ON_FALSE((speed_mode == LEDC_LOW_SPEED_MODE), ESP_ERR_INVALID_ARG, LEDC_TAG, "RC_FAST clock can only be used in low speed mode");
/* Before calculating the divisor, we need to have the RC_FAST frequency.
* If it hasn't been measured yet, try calibrating it now. */
if (s_ledc_slow_clk_rc_fast_freq == 0 && ledc_slow_clk_calibrate() == false) {
goto error;
}
/* Set the global clock source */
timer_clk_src = LEDC_SCLK;
glb_clk = LEDC_SLOW_CLK_RC_FAST;
/* We have the RC_FAST clock frequency now. */
div_param = ledc_calculate_divisor(s_ledc_slow_clk_rc_fast_freq, freq_hz, precision);
if (LEDC_IS_DIV_INVALID(div_param)) {
div_param = LEDC_CLK_NOT_FOUND;
}
} else {
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
if (LEDC_LL_IS_TIMER_SPECIFIC_CLOCK(speed_mode, clk_cfg)) {
/* Currently we can convert a timer-specific clock to a source clock that
* easily because their values are identical in the enumerations (on purpose)
* If we decide to change the values in the future, we should consider defining
* a macro/function to convert timer-specific clock to clock source .*/
timer_clk_src = (ledc_clk_src_t) clk_cfg;
} else
#endif
{
timer_clk_src = LEDC_SCLK;
#if SOC_LEDC_SUPPORT_REF_TICK
assert(clk_cfg != LEDC_USE_REF_TICK); // REF_TICK is NOT a global clock, it is a timer-specific clock
#endif
glb_clk = (ledc_slow_clk_sel_t)clk_cfg;
}
uint32_t src_clk_freq = 0;
esp_clk_tree_src_get_freq_hz((soc_module_clk_t)clk_cfg, LEDC_CLK_SRC_FREQ_PRECISION, &src_clk_freq);
div_param = ledc_calculate_divisor(src_clk_freq, freq_hz, precision);
if (LEDC_IS_DIV_INVALID(div_param)) {
div_param = LEDC_CLK_NOT_FOUND;
}
}
if (div_param == LEDC_CLK_NOT_FOUND) {
goto error;
}
/* The following debug message makes more sense for AUTO mode. */
ESP_LOGD(LEDC_TAG, "Using clock source %d (in %s mode), divisor: 0x%"PRIx32,
timer_clk_src, (speed_mode == LEDC_LOW_SPEED_MODE ? "slow" : "fast"), div_param);
/* The following block configures the global clock.
* Thus, in theory, this only makes sense when configuring the LOW_SPEED timer and the source clock is LEDC_SCLK (as
* HIGH_SPEED timers won't be clocked by the global clock). However, there are some limitations due to HW design.
*/
if (speed_mode == LEDC_LOW_SPEED_MODE) {
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
/* On ESP32 and ESP32-S2, when the source clock of LOW_SPEED timer is a timer-specific one (i.e. REF_TICK), the
* global clock MUST be set to APB_CLK. For HIGH_SPEED timers, this is not necessary.
*/
if (timer_clk_src != LEDC_SCLK) {
glb_clk = LEDC_SLOW_CLK_APB;
}
#else
/* On later chips, there is only one type of timer/channel (referred as LOW_SPEED in the code), which can only be
* clocked by the global clock. So there's no limitation on the global clock, except that it must be set.
*/
assert(timer_clk_src == LEDC_SCLK);
#endif
// Arriving here, variable glb_clk must have been assigned to one of the ledc_slow_clk_sel_t enum values
assert(glb_clk != LEDC_SLOW_CLK_UNINIT);
portENTER_CRITICAL(&ledc_spinlock);
if (p_ledc_obj[speed_mode]->glb_clk != LEDC_SLOW_CLK_UNINIT && p_ledc_obj[speed_mode]->glb_clk != glb_clk) {
for (int i = 0; i < LEDC_TIMER_MAX; i++) {
if (i != timer_num && p_ledc_obj[speed_mode]->glb_clk_is_acquired[i]) {
portEXIT_CRITICAL(&ledc_spinlock);
ESP_RETURN_ON_FALSE(false, ESP_FAIL, LEDC_TAG,
"timer clock conflict, already is %d but attempt to %d", p_ledc_obj[speed_mode]->glb_clk, glb_clk);
}
}
}
p_ledc_obj[speed_mode]->glb_clk_is_acquired[timer_num] = true;
if (p_ledc_obj[speed_mode]->glb_clk != glb_clk) {
#if SOC_LIGHT_SLEEP_SUPPORTED
/* keep ESP_PD_DOMAIN_RC_FAST on during light sleep */
if (glb_clk == LEDC_SLOW_CLK_RC_FAST) {
/* Keep ESP_PD_DOMAIN_RC_FAST on during light sleep */
esp_sleep_sub_mode_config(ESP_SLEEP_DIG_USE_RC_FAST_MODE, true);
} else if (p_ledc_obj[speed_mode]->glb_clk == LEDC_SLOW_CLK_RC_FAST) {
/* No need to keep ESP_PD_DOMAIN_RC_FAST on during light sleep anymore */
esp_sleep_sub_mode_config(ESP_SLEEP_DIG_USE_RC_FAST_MODE, false);
}
#endif
// TODO: release old glb_clk (if not UNINIT), and acquire new glb_clk [clk_tree]
p_ledc_obj[speed_mode]->glb_clk = glb_clk;
esp_clk_tree_enable_src((soc_module_clk_t)glb_clk, true);
LEDC_FUNC_CLOCK_ATOMIC() {
ledc_ll_enable_clock(p_ledc_obj[speed_mode]->ledc_hal.dev, true);
ledc_hal_set_slow_clk_sel(&(p_ledc_obj[speed_mode]->ledc_hal), glb_clk);
}
}
portEXIT_CRITICAL(&ledc_spinlock);
ESP_LOGD(LEDC_TAG, "In slow speed mode, global clk set: %d", glb_clk);
}
/* The divisor is correct, we can write in the hardware. */
ledc_timer_set(speed_mode, timer_num, div_param, duty_resolution, timer_clk_src);
return ESP_OK;
error:
ESP_LOGE(LEDC_TAG, "requested frequency %d and duty resolution %d can not be achieved, try reducing freq_hz or duty_resolution. div_param=%"PRIu32, freq_hz, duty_resolution, div_param);
return ESP_FAIL;
}
static esp_err_t ledc_timer_del(ledc_mode_t speed_mode, ledc_timer_t timer_sel)
{
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
bool is_configured = true;
bool is_deleted = false;
portENTER_CRITICAL(&ledc_spinlock);
#if SOC_LEDC_HAS_TIMER_SPECIFIC_MUX
if (p_ledc_obj[speed_mode]->glb_clk_is_acquired[timer_sel] == false && p_ledc_obj[speed_mode]->timer_specific_clk[timer_sel] == LEDC_TIMER_SPECIFIC_CLK_UNINIT)
#else
if (p_ledc_obj[speed_mode]->glb_clk_is_acquired[timer_sel] == false)
#endif
{
is_configured = false;
} else if (p_ledc_obj[speed_mode]->timer_is_stopped[timer_sel] == true) {
is_deleted = true;
p_ledc_obj[speed_mode]->glb_clk_is_acquired[timer_sel] = false;
// TODO: release timer specific clk and global clk if possible [clk_tree]
}
portEXIT_CRITICAL(&ledc_spinlock);
ESP_RETURN_ON_FALSE(is_configured && is_deleted, ESP_ERR_INVALID_STATE, LEDC_TAG, "timer hasn't been configured, or it is still running, please stop it with ledc_timer_pause first");
return ESP_OK;
}
esp_err_t ledc_timer_config(const ledc_timer_config_t *timer_conf)
{
LEDC_ARG_CHECK(timer_conf != NULL, "timer_conf");
uint32_t freq_hz = timer_conf->freq_hz;
uint32_t duty_resolution = timer_conf->duty_resolution;
uint32_t timer_num = timer_conf->timer_num;
uint32_t speed_mode = timer_conf->speed_mode;
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(timer_num < LEDC_TIMER_MAX, "timer_num");
if (timer_conf->deconfigure) {
return ledc_timer_del(speed_mode, timer_num);
}
LEDC_ARG_CHECK(!((timer_conf->clk_cfg == LEDC_USE_RC_FAST_CLK) && (speed_mode != LEDC_LOW_SPEED_MODE)), "Only low speed channel support RC_FAST_CLK");
if (freq_hz == 0 || duty_resolution == 0 || duty_resolution >= LEDC_TIMER_BIT_MAX) {
ESP_LOGE(LEDC_TAG, "freq_hz=%"PRIu32" duty_resolution=%"PRIu32, freq_hz, duty_resolution);
return ESP_ERR_INVALID_ARG;
}
if (!ledc_speed_mode_ctx_create(speed_mode) && !p_ledc_obj[speed_mode]) {
return ESP_ERR_NO_MEM;
}
esp_err_t ret = ledc_set_timer_div(speed_mode, timer_num, timer_conf->clk_cfg, freq_hz, duty_resolution);
if (ret == ESP_OK) {
/* Make sure timer is running and reset the timer. */
ledc_timer_resume(speed_mode, timer_num);
ledc_timer_rst(speed_mode, timer_num);
}
return ret;
}
esp_err_t _ledc_set_pin(int gpio_num, bool out_inv, ledc_mode_t speed_mode, ledc_channel_t channel)
{
gpio_func_sel(gpio_num, PIN_FUNC_GPIO);
// reserve the GPIO output path, because we don't expect another peripheral to signal to the same GPIO
uint64_t old_gpio_rsv_mask = esp_gpio_reserve(BIT64(gpio_num));
// check if the GPIO is already used by others, LEDC signal only uses the output path of the GPIO
if (old_gpio_rsv_mask & BIT64(gpio_num)) {
ESP_LOGW(LEDC_TAG, "GPIO %d is not usable, maybe conflict with others", gpio_num);
}
esp_rom_gpio_connect_out_signal(gpio_num, ledc_periph_signal[speed_mode].sig_out0_idx + channel, out_inv, 0);
return ESP_OK;
}
// One LEDC channel signal can be directed to multiple IOs as outputs
esp_err_t ledc_set_pin(int gpio_num, ledc_mode_t speed_mode, ledc_channel_t channel)
{
LEDC_ARG_CHECK(channel < LEDC_CHANNEL_MAX, "channel");
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "gpio_num");
return _ledc_set_pin(gpio_num, false, speed_mode, channel);
}
esp_err_t ledc_channel_config(const ledc_channel_config_t *ledc_conf)
{
LEDC_ARG_CHECK(ledc_conf, "ledc_conf");
uint32_t speed_mode = ledc_conf->speed_mode;
int gpio_num = ledc_conf->gpio_num;
uint32_t ledc_channel = ledc_conf->channel;
uint32_t timer_select = ledc_conf->timer_sel;
uint32_t intr_type = ledc_conf->intr_type;
uint32_t duty = ledc_conf->duty;
uint32_t hpoint = ledc_conf->hpoint;
bool output_invert = ledc_conf->flags.output_invert;
LEDC_ARG_CHECK(ledc_channel < LEDC_CHANNEL_MAX, "ledc_channel");
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "gpio_num");
LEDC_ARG_CHECK(timer_select < LEDC_TIMER_MAX, "timer_select");
LEDC_ARG_CHECK(intr_type < LEDC_INTR_MAX, "intr_type");
esp_err_t ret = ESP_OK;
bool new_speed_mode_ctx_created = ledc_speed_mode_ctx_create(speed_mode);
if (!new_speed_mode_ctx_created && !p_ledc_obj[speed_mode]) {
return ESP_ERR_NO_MEM;
}
#if !(CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 || CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61)
// On such targets, the default ledc core(global) clock does not connect to any clock source
// Set channel configurations and update bits before core clock is on could lead to error
// Therefore, we should connect the core clock to a real clock source to make it on before any ledc register operation
// It can be switched to the other desired clock sources to meet the output pwm freq requirement later at timer configuration
// So we consider the glb_clk still as LEDC_SLOW_CLK_UNINIT
else if (new_speed_mode_ctx_created) {
portENTER_CRITICAL(&ledc_spinlock);
if (p_ledc_obj[speed_mode]->glb_clk == LEDC_SLOW_CLK_UNINIT) {
esp_clk_tree_enable_src((soc_module_clk_t)LEDC_LL_GLOBAL_CLK_DEFAULT, true);
ledc_hal_set_slow_clk_sel(&(p_ledc_obj[speed_mode]->ledc_hal), LEDC_LL_GLOBAL_CLK_DEFAULT);
}
portEXIT_CRITICAL(&ledc_spinlock);
}
#endif
/*set channel parameters*/
/* channel parameters decide how the waveform looks like in one period */
/* set channel duty and hpoint value, duty range is [0, (2**duty_res)], hpoint range is [0, (2**duty_res)-1] */
/* Note: On ESP32, ESP32S2, ESP32S3, ESP32C3, ESP32C2, ESP32C6, ESP32H2, ESP32P4, due to a hardware bug,
* 100% duty cycle (i.e. 2**duty_res) is not reachable when the binded timer selects the maximum duty
* resolution. For example, the max duty resolution on ESP32C3 is 14-bit width, then set duty to (2**14)
* will mess up the duty calculation in hardware.
*/
ledc_set_duty_with_hpoint(speed_mode, ledc_channel, duty, hpoint);
/*update duty settings*/
ledc_update_duty(speed_mode, ledc_channel);
/*bind the channel with the timer*/
ledc_bind_channel_timer(speed_mode, ledc_channel, timer_select);
/*set interrupt type*/
portENTER_CRITICAL(&ledc_spinlock);
ledc_enable_intr_type(speed_mode, ledc_channel, intr_type);
portEXIT_CRITICAL(&ledc_spinlock);
ESP_LOGD(LEDC_TAG, "LEDC_PWM CHANNEL %"PRIu32"|GPIO %02u|Duty %04"PRIu32"|Time %"PRIu32,
ledc_channel, gpio_num, duty, timer_select);
/*set LEDC signal in gpio matrix*/
_ledc_set_pin(gpio_num, output_invert, speed_mode, ledc_channel);
return ret;
}
static void _ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel)
{
ledc_hal_set_sig_out_en(&(p_ledc_obj[speed_mode]->ledc_hal), channel, true);
ledc_hal_set_duty_start(&(p_ledc_obj[speed_mode]->ledc_hal), channel, true);
ledc_ls_channel_update(speed_mode, channel);
}
esp_err_t ledc_update_duty(ledc_mode_t speed_mode, ledc_channel_t channel)
{
LEDC_ARG_CHECK_ISR(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK_ISR(channel < LEDC_CHANNEL_MAX, "channel");
LEDC_CHECK_ISR(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL_SAFE(&ledc_spinlock);
_ledc_update_duty(speed_mode, channel);
portEXIT_CRITICAL_SAFE(&ledc_spinlock);
return ESP_OK;
}
esp_err_t ledc_stop(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t idle_level)
{
LEDC_ARG_CHECK_ISR(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK_ISR(channel < LEDC_CHANNEL_MAX, "channel");
LEDC_CHECK_ISR(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL_SAFE(&ledc_spinlock);
ledc_hal_set_idle_level(&(p_ledc_obj[speed_mode]->ledc_hal), channel, idle_level);
ledc_hal_set_sig_out_en(&(p_ledc_obj[speed_mode]->ledc_hal), channel, false);
ledc_hal_set_duty_start(&(p_ledc_obj[speed_mode]->ledc_hal), channel, false);
ledc_ls_channel_update(speed_mode, channel);
portEXIT_CRITICAL_SAFE(&ledc_spinlock);
return ESP_OK;
}
esp_err_t ledc_set_fade(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t duty, ledc_duty_direction_t fade_direction,
uint32_t step_num, uint32_t duty_cycle_num, uint32_t duty_scale)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(channel < LEDC_CHANNEL_MAX, "channel");
LEDC_ARG_CHECK(fade_direction < LEDC_DUTY_DIR_MAX, "fade_direction");
LEDC_ARG_CHECK(step_num <= LEDC_LL_DUTY_NUM_MAX, "step_num");
LEDC_ARG_CHECK(duty_cycle_num <= LEDC_LL_DUTY_CYCLE_MAX, "duty_cycle_num");
LEDC_ARG_CHECK(duty_scale <= LEDC_LL_DUTY_SCALE_MAX, "duty_scale");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
_ledc_fade_hw_acquire(speed_mode, channel);
portENTER_CRITICAL(&ledc_spinlock);
ledc_duty_config(speed_mode,
channel, //uint32_t chan_num,
LEDC_VAL_NO_CHANGE,
duty, //uint32_t duty_val,
fade_direction, //uint32_t increase,
step_num, //uint32_t duty_num,
duty_cycle_num, //uint32_t duty_cycle,
duty_scale //uint32_t duty_scale
);
portEXIT_CRITICAL(&ledc_spinlock);
_ledc_fade_hw_release(speed_mode, channel);
return ESP_OK;
}
esp_err_t ledc_set_duty_with_hpoint(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t duty, uint32_t hpoint)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(channel < LEDC_CHANNEL_MAX, "channel");
LEDC_ARG_CHECK(hpoint <= LEDC_LL_HPOINT_VAL_MAX, "hpoint");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
/* The channel configuration should not be changed before the fade operation is done. */
_ledc_fade_hw_acquire(speed_mode, channel);
portENTER_CRITICAL(&ledc_spinlock);
ledc_duty_config(speed_mode,
channel, //uint32_t chan_num,
hpoint, //uint32_t hpoint_val,
duty, //uint32_t duty_val,
1, //uint32_t increase,
1, //uint32_t duty_num,
1, //uint32_t duty_cycle,
0 //uint32_t duty_scale
);
portEXIT_CRITICAL(&ledc_spinlock);
_ledc_fade_hw_release(speed_mode, channel);
return ESP_OK;
}
esp_err_t ledc_set_duty(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t duty)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(channel < LEDC_CHANNEL_MAX, "channel");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
/* The channel configuration should not be changed before the fade operation is done. */
_ledc_fade_hw_acquire(speed_mode, channel);
portENTER_CRITICAL(&ledc_spinlock);
ledc_duty_config(speed_mode,
channel, //uint32_t chan_num,
LEDC_VAL_NO_CHANGE,
duty, //uint32_t duty_val,
1, //uint32_t increase,
1, //uint32_t duty_num,
1, //uint32_t duty_cycle,
0 //uint32_t duty_scale
);
portEXIT_CRITICAL(&ledc_spinlock);
_ledc_fade_hw_release(speed_mode, channel);
return ESP_OK;
}
uint32_t ledc_get_duty(ledc_mode_t speed_mode, ledc_channel_t channel)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(channel < LEDC_CHANNEL_MAX, "channel");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
uint32_t duty = 0;
ledc_hal_get_duty(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &duty);
return duty;
}
int ledc_get_hpoint(ledc_mode_t speed_mode, ledc_channel_t channel)
{
LEDC_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode argument is invalid", LEDC_ERR_VAL);
LEDC_CHECK(channel < LEDC_CHANNEL_MAX, "channel argument is invalid", LEDC_ERR_VAL);
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
uint32_t hpoint = 0;
ledc_hal_get_hpoint(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &hpoint);
return hpoint;
}
esp_err_t ledc_set_freq(ledc_mode_t speed_mode, ledc_timer_t timer_num, uint32_t freq_hz)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(timer_num < LEDC_TIMER_MAX, "timer_num");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
ledc_clk_cfg_t clk_cfg = LEDC_AUTO_CLK;
uint32_t duty_resolution = 0;
ledc_hal_get_clk_cfg(&(p_ledc_obj[speed_mode]->ledc_hal), timer_num, &clk_cfg);
ledc_hal_get_duty_resolution(&(p_ledc_obj[speed_mode]->ledc_hal), timer_num, &duty_resolution);
return ledc_set_timer_div(speed_mode, timer_num, clk_cfg, freq_hz, duty_resolution);
}
uint32_t ledc_get_freq(ledc_mode_t speed_mode, ledc_timer_t timer_num)
{
LEDC_ARG_CHECK(speed_mode < LEDC_SPEED_MODE_MAX, "speed_mode");
LEDC_ARG_CHECK(timer_num < LEDC_TIMER_MAX, "timer_num");
LEDC_CHECK(p_ledc_obj[speed_mode] != NULL, LEDC_NOT_INIT, ESP_ERR_INVALID_STATE);
portENTER_CRITICAL(&ledc_spinlock);
uint32_t clock_divider = 0;
uint32_t duty_resolution = 0;
ledc_clk_cfg_t clk_cfg = LEDC_AUTO_CLK;
ledc_hal_get_clock_divider(&(p_ledc_obj[speed_mode]->ledc_hal), timer_num, &clock_divider);
ledc_hal_get_duty_resolution(&(p_ledc_obj[speed_mode]->ledc_hal), timer_num, &duty_resolution);
ledc_hal_get_clk_cfg(&(p_ledc_obj[speed_mode]->ledc_hal), timer_num, &clk_cfg);
uint32_t precision = (0x1 << duty_resolution);
uint32_t src_clk_freq = 0;
esp_clk_tree_src_get_freq_hz((soc_module_clk_t)clk_cfg, LEDC_CLK_SRC_FREQ_PRECISION, &src_clk_freq);
portEXIT_CRITICAL(&ledc_spinlock);
if (clock_divider == 0) {
ESP_LOGW(LEDC_TAG, "LEDC timer not configured, call ledc_timer_config to set timer frequency");
return 0;
}
return (((uint64_t) src_clk_freq << LEDC_LL_FRACTIONAL_BITS) + precision * clock_divider / 2) / (precision * clock_divider);
}
static inline uint32_t ilog2(uint32_t i)
{
assert(i > 0);
uint32_t log = 0;
while (i >>= 1) {
++log;
}
return log;
}
// https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf#ledpwm
uint32_t ledc_find_suitable_duty_resolution(uint32_t src_clk_freq, uint32_t timer_freq)
{
// Highest resolution is calculated when LEDC_CLK_DIV = 1 (i.e. div_param = 1 << LEDC_LL_FRACTIONAL_BITS)
uint32_t div = (src_clk_freq + timer_freq / 2) / timer_freq; // rounded
uint32_t duty_resolution = MIN(ilog2(div), SOC_LEDC_TIMER_BIT_WIDTH);
uint32_t div_param = ledc_calculate_divisor(src_clk_freq, timer_freq, 1 << duty_resolution);
if (LEDC_IS_DIV_INVALID(div_param)) {
div = src_clk_freq / timer_freq; // truncated
duty_resolution = MIN(ilog2(div), SOC_LEDC_TIMER_BIT_WIDTH);
div_param = ledc_calculate_divisor(src_clk_freq, timer_freq, 1 << duty_resolution);
if (LEDC_IS_DIV_INVALID(div_param)) {
duty_resolution = 0;
}
}
return duty_resolution;
}
static inline void IRAM_ATTR ledc_calc_fade_end_channel(uint32_t *fade_end_status, uint32_t *channel)
{
uint32_t i = __builtin_ffs((*fade_end_status)) - 1;
(*fade_end_status) &= ~(1 << i);
*channel = i;
}
static void IRAM_ATTR ledc_fade_isr(void *arg)
{
bool cb_yield = false;
BaseType_t HPTaskAwoken = pdFALSE;
uint32_t speed_mode = 0;
uint32_t channel = 0;
uint32_t intr_status = 0;
ledc_fade_fsm_t state;
for (speed_mode = 0; speed_mode < LEDC_SPEED_MODE_MAX; speed_mode++) {
if (p_ledc_obj[speed_mode] == NULL) {
continue;
}
ledc_hal_get_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), &intr_status);
while (intr_status) {
ledc_calc_fade_end_channel(&intr_status, &channel);
// clear interrupt
ledc_hal_clear_fade_end_intr_status(&(p_ledc_obj[speed_mode]->ledc_hal), channel);
if (s_ledc_fade_rec[speed_mode][channel] == NULL) {
//fade object not initialized yet.
continue;
}
// Switch fade state to ISR_CAL if current state is HW_FADE
bool already_stopped = false;
portENTER_CRITICAL_ISR(&ledc_spinlock);
state = s_ledc_fade_rec[speed_mode][channel]->fsm;
assert(state != LEDC_FSM_ISR_CAL && state != LEDC_FSM_KILLED_PENDING);
if (state == LEDC_FSM_HW_FADE) {
s_ledc_fade_rec[speed_mode][channel]->fsm = LEDC_FSM_ISR_CAL;
} else if (state == LEDC_FSM_IDLE) {
// interrupt seen, but has already been stopped by task
already_stopped = true;
}
portEXIT_CRITICAL_ISR(&ledc_spinlock);
if (already_stopped) {
continue;
}
bool set_to_idle = false;
int cycle = 0;
int delta = 0;
int step = 0;
int next_duty = 0;
uint32_t duty_cur = 0;
ledc_hal_get_duty(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &duty_cur);
uint32_t duty_tar = s_ledc_fade_rec[speed_mode][channel]->target_duty;
#if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
// If a multi-fade is done, check that target duty computed in sw is equal to the duty at the end of the fade
uint32_t range_num;
ledc_hal_get_range_number(&(p_ledc_obj[speed_mode]->ledc_hal), channel, &range_num);
if (range_num > 1) {
assert(duty_cur == duty_tar);
}
#endif
int scale = s_ledc_fade_rec[speed_mode][channel]->scale;
if (duty_cur == duty_tar || scale == 0) {
// Target duty has reached
set_to_idle = true;
} else {
// Calculate new duty config parameters
delta = (s_ledc_fade_rec[speed_mode][channel]->direction == LEDC_DUTY_DIR_DECREASE) ?
(duty_cur - duty_tar) : (duty_tar - duty_cur);
if (delta > scale) {
next_duty = duty_cur;
step = (delta / scale > LEDC_DUTY_NUM_MAX) ? LEDC_DUTY_NUM_MAX : (delta / scale);
cycle = s_ledc_fade_rec[speed_mode][channel]->cycle_num;
} else {