RISCV: Separate PLIC and non-PLIC (#428)

* RISCV: Separate PLIC and non-PLIC

* De-duplicate code

* Write 0 to INTR_MAP again to disable peripheral interrupts

* Limit visibility of `get_assigned_cpu_interrupt`

Author: bjoernQ

esp-hal-common/build.rs

@@ -39,6 +39,7 @@ fn main() {
     //   - 'gdma'
     //   - 'i2c1'
     //   - 'i2s'
+    //   - 'large_intr_status'
     //   - 'mcpwm'
     //   - 'pcnt'
     //   - 'pdma'
@@ -110,6 +111,7 @@ fn main() {
             "aes",
             "gdma",
             "i2s",
+            "large_intr_status",
             "mcpwm",
             "pcnt",
             "plic",