Added chip45boot2 code, docs, etc.

Author: eriklins

LICENSE

@@ -1,6 +1,6 @@
 MIT License
 
-Copyright (c) 2023 ER!K
+Copyright (c) 2023 Erik Lins
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal

README.md

@@ -1,2 +1,51 @@
 # chip45boot2
 Bootloader for Atmel AVR ATmega and Xmega micro controllers with Intel hex file support and automatic baudrate adjustment. 
+
+chip45boot2 was previously offered commercially by chip45.com and is now available as open-source under MIT License.
+
+## Description
+
+Flexible bootloader for AVR microcontrollers with auto-baud, hexfile support and extra functions. See [infosheet](docs/chip45boot2_infosheet.pdf) for details.
+
+## Features
+chip45boot2 provides the following features:
+
+- direct input of Intel Hex files
+- automatic baud rate adjustment
+- XON/XOFF protocol
+- Flash and EEPROM programming
+- byte-wise writing and reading of SRAM memory
+- byte-wise writing and reading of EEPROM memory
+- 2k bootblock size
+- graphical Windows user interface chip45boot2 GUI for programming from PC
+- The bootloader automatically adjusts at start to the hosts baudrate, so that it is not necessary to recompile the bootloader to a particular MCU clock.
+
+## Further Information
+
+- [chip45boot2 Infosheet](docs/chip45boot2_infosheet.pdf)
+- [Notes for using Atmel Studio](docs/chip45boot2_Studio6_notes.pdf)
+
+## PC Software
+The chip45boot2 GUI is a PC/Windows application with a graphical user interface for the bootloader, which simplifies flash and eeprom programming over a COM port.
+
+![chip45boot2 PC GUI](img/chip45boot2_GUI.png)
+
+You can download Windows binaries under [releases](https://github.com/eriklins/chip45boot2/releases).
+
+The PC software was programmed with LabWindows/CVI and hence requires an active license for that.
+
+## Command Line Tool
+[c45b](https://github.com/bullestock/c45b) is a command line frontend for the bootloader.
+
+## Pre-Compiled Hex Files
+Pre-built bootloader hexfiles for a bunch of AVR MCUs are included under [bootloader/build](bootloader/build).
+
+## Contributing/Feedback
+Feedback / improvements / pull-requests / etc. are welcome. 
+
+However, I decided to open-source the bootloader due to lack of time/resources available for supporting the bootloader anymore, hence I cannot guarantee working on issues/pull-requests in the short-term.
+
+## License
+Copyright (C) 2023 Erik Lins
+
+This project is released under the MIT License.

bootloader/avr_compiler.h

@@ -0,0 +1,87 @@
+/* This file has been prepared for Doxygen automatic documentation generation.*/
+/*! \file *********************************************************************
+ *
+ * \brief This file implements some macros that makes the IAR C-compiler and
+ *        avr-gcc work with the same code base for the AVR architecture.
+ *
+ * \par Documentation
+ *      For comprehensive code documentation, supported compilers, compiler
+ *      settings and supported devices see readme.html
+ *
+ * \author
+ *      Atmel Corporation: http://www.atmel.com \n
+ *      Support email: avr@atmel.com
+ *
+ * $Revision: 613 $
+ * $Date: 2006-04-07 14:40:07 +0200 (fr, 07 apr 2006) $  \n
+ *
+ * Copyright (c) 2008, Atmel Corporation All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. The name of ATMEL may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
+ * SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ ******************************************************************************/
+
+#ifndef COMPILER_AVR_H
+#define COMPILER_AVR_H
+
+#ifndef F_CPU
+/*! \brief Define default CPU frequency, if this is not already defined. */
+#define F_CPU 7372800UL
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdlib.h>
+
+/*! \brief This macro will protect the following code from interrupts. */
+#define AVR_ENTER_CRITICAL_REGION( ) uint8_t volatile saved_sreg = SREG; \
+                                     cli();
+
+/*! \brief This macro must always be used in conjunction with AVR_ENTER_CRITICAL_REGION
+ *        so the interrupts are enabled again.
+ */
+#define AVR_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;
+
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <avr/pgmspace.h>
+#include <util/delay.h>
+
+/*! \brief Define the delay_us macro for GCC. */
+#define delay_us( us )   (_delay_us( us ))
+
+#define INLINE static inline
+
+/*! \brief Define the no operation macro. */
+#define nop()   do { __asm__ __volatile__ ("nop"); } while (0)
+
+#define MAIN_TASK_PROLOGUE int
+
+
+#define MAIN_TASK_EPILOGUE() return -1;
+
+#define SHORTENUM __attribute__ ((packed))
+
+#endif
+

bootloader/boot.c

@@ -0,0 +1,101 @@
+// boot.c
+//
+// own boot.c functions for xmega
+// these functions are implemented as wrapper functions 
+
+#include <avr/interrupt.h>
+
+#include "sp_driver.h"
+#include "mcudefs.h"
+
+// on A3 devices with die revision B a workaround is required
+#ifdef WORKAROUND
+
+//Temporary storage used for NVM-workaround
+uint8_t sleepCtr;
+uint8_t statusStore;
+uint8_t pmicStore;
+uint8_t globalInt;
+uint8_t spmintStore;
+
+// SPM wakeup interrupt
+ISR(NVM_SPM_vect) {
+	NVM.INTCTRL = (NVM.INTCTRL & ~NVM_SPMLVL_gm);  // Disable the SPM interrupt
+	SLEEP.CTRL = sleepCtr;  // Restore sleep settings
+	// Restore PMIC status and control registers
+	PMIC.STATUS = statusStore;
+	PMIC.CTRL = pmicStore;
+	NVM.INTCTRL = spmintStore;  // Restore SPM interruptsettings
+	SREG = globalInt;  // Restore global interrupt settings
+}
+
+// Set interrupt vector location to boot section of flash
+void PMIC_SetVectorLocationToBoot( void ) {
+	uint8_t temp = PMIC.CTRL | PMIC_IVSEL_bm;
+	CCP = CCP_IOREG_gc;
+	PMIC.CTRL = temp;
+}
+
+// Set interrupt vector location to application section of flash
+void PMIC_SetVectorLocationToApplication( void ) {
+	uint8_t temp = PMIC.CTRL & ~PMIC_IVSEL_bm;
+	CCP = CCP_IOREG_gc;
+	PMIC.CTRL = temp;
+}
+
+// Save register settings before entering sleep mode
+void Prepare_to_Sleep( void ) {
+	sleepCtr = SLEEP.CTRL;
+	SLEEP.CTRL =  0x00;  // Set sleep mode to IDLE
+	// Save the PMIC Status and control registers
+	statusStore = PMIC.STATUS;								
+	pmicStore = PMIC.CTRL;		
+	PMIC.CTRL = (PMIC.CTRL & ~(PMIC_MEDLVLEN_bm | PMIC_LOLVLEN_bm)) | PMIC_HILVLEN_bm;  // Enable only the highest level of interrupts
+	globalInt = SREG;  // Save SREG for later use
+	sei();  // Enable global interrupts
+	spmintStore = NVM.INTCTRL;  // Save SPM interrupt settings for later
+}
+#endif  // WORKAROUND
+
+
+void boot_page_fill(uint32_t ulAddress, uint16_t usData) {
+
+#ifdef WORKAROUND
+	Prepare_to_Sleep();
+#endif
+	SP_LoadFlashWord(ulAddress, usData);
+}
+
+
+void boot_page_erase(uint32_t ulAddress) {  // do a page erase
+
+#ifdef WORKAROUND
+	Prepare_to_Sleep();
+#endif
+	SP_EraseApplicationPage(ulAddress);
+}
+
+
+void boot_spm_busy_wait() {  // wait for page erase done
+
+#ifdef WORKAROUND
+	Prepare_to_Sleep();
+#endif
+	SP_WaitForSPM();
+}
+
+
+void boot_page_write(uint32_t ulAddress) {  // do a page write
+
+#ifdef WORKAROUND
+	Prepare_to_Sleep();
+#endif
+	SP_WriteApplicationPage(ulAddress);
+}
+
+
+void boot_rww_enable() {  // reenable rww section again
+}
+
+
+// end of file: boot.c

bootloader/boot.h

@@ -0,0 +1,28 @@
+// usart.h
+//
+// own boot.c functions for xmega	
+
+// make sure to include just once!
+#ifndef _BOOT_H_
+#define _BOOT_H_
+
+// include the spm function of AVR1605 application note
+#include "sp_driver.h"
+#include "mcudefs.h"
+
+
+// prototypes
+
+#ifdef WORKAROUND  // on A3 devices with die revision B a workaround is required
+void PMIC_SetVectorLocationToBoot( void );
+void PMIC_SetVectorLocationToApplication( void );
+#endif
+void boot_page_fill(uint32_t ulAddress, uint16_t usData);
+void boot_page_erase(uint32_t ulAddress);  // do a page erase
+void boot_spm_busy_wait();  // wait for page erase done
+void boot_page_write(uint32_t ulAddress);  // do a page write
+void boot_rww_enable();  // reenable rww section again
+#endif
+
+
+// end of file: boot.h