- Waterloo, Canada
- in/eric-pearson-linked-in
Pinned Loading
-
-
fpga_rocket_launcher
fpga_rocket_launcher PublicModel rocket launch controller implemented in a FPGA chip
SystemVerilog
-
launch_control_chip
launch_control_chip PublicA model rocket launch control chip in a 3mm x 3mm package. A better push button.
-
sha256-fpga
sha256-fpga PublicSet of increasing speed SHA2 hash designs fitting in an Altera 10M25 fpga. Measured 8 Mhz SHA2 double hashes. I can see the steps to get to terra hash rate realm asics.
SystemVerilog
-
croc
croc PublicForked from pulp-platform/croc
forked tiny tapeout tracable riscV soc with build and sim environments. I've integrated a nist800-232 cipher adding control and dma in systemverilog with tests in C.
SystemVerilog
-
NiteFury-and-LiteFury
NiteFury-and-LiteFury PublicForked from RHSResearchLLC/NiteFury-and-LiteFury
Public repository for Litefury & Nitefury
SystemVerilog
If the problem persists, check the GitHub status page or contact support.