added token support back f ro header files and ams files

Author: joecrop

package.json

@@ -2,7 +2,7 @@
     "name": "systemverilog",
     "displayName": "SystemVerilog - Language Support",
     "description": "Language support for Verilog and SystemVerilog.",
-    "version": "0.13.9",
+    "version": "0.13.10",
     "publisher": "eirikpre",
     "author": {
         "name": "Eirik Prestegårdshus",

src/compiling/DocumentCompiler.ts

@@ -4,7 +4,7 @@ import { URI } from 'vscode-uri';
 import * as path from 'path';
 import * as child from 'child_process';
 import { getPathFromUri } from '../utils/common';
-import { isSystemVerilogDocument, isVerilogDocument, getLineRange } from '../utils/server';
+import { isSystemVerilogDocument, isVerilogDocument, isVerilogAMSDocument, getLineRange } from '../utils/server';
 import { DiagnosticData } from './DiagnosticData';
 
 /* 
@@ -45,7 +45,7 @@ export abstract class DocumentCompiler {
                 return;
             }
 
-            if (!isSystemVerilogDocument(document) && !isVerilogDocument(document)) {
+            if (!isSystemVerilogDocument(document) && !isVerilogDocument(document) && !isVerilogAMSDocument(document)) {
                 reject(new Error('The document is not a SystemVerilog/Verilog file.'));
                 return;
             }

src/extension.ts

@@ -20,7 +20,11 @@ let closeWindowProgress = true;
 
 const selector: DocumentSelector = [
     { scheme: 'file', language: 'systemverilog' },
-    { scheme: 'file', language: 'verilog' }
+    { scheme: 'file', language: 'systemverilogheader' },
+    { scheme: 'file', language: 'verilog' },
+    { scheme: 'file', language: 'verilogheader' },
+    { scheme: 'file', language: 'veriloga' },
+    { scheme: 'file', language: 'verilogams' },
 ];
 
 let indexer: SystemVerilogIndexer | undefined = undefined;

src/indexer.ts

@@ -3,7 +3,7 @@ import { CancellationToken } from 'vscode-languageclient/node';
 import * as glob from 'glob';
 import * as minimatch from 'minimatch';
 import { SystemVerilogParser } from './parser';
-import { isSystemVerilogDocument, isVerilogDocument } from './utils/client';
+import { isSystemVerilogDocument, isVerilogDocument, isVerilogAMSDocument } from './utils/client';
 import { SystemVerilogSymbol } from './symbol';
 
 export class SystemVerilogIndexer {
@@ -136,7 +136,7 @@ export class SystemVerilogIndexer {
                     if (total_files >= 100 * this.parallelProcessing) {
                         return this.parser.get_all_recursive(doc, 'declaration', 0);
                     }
-                    if (doc.lineCount > this.maxLineCountIndexing) {
+                    if (doc.lineCount > this.maxLineCountIndexing.valueOf()) {
                         window.showInformationMessage(
                             `The character count of ${workspace.asRelativePath(uri)} is larger than ${this.maxLineCountIndexing}. Falling back to fast parse. To fully parse this file, please set 'systemverilog.maxLineCountIndexing > ${doc.lineCount} in the systemverilog extension settings.`
                         ); // prettier-ignore
@@ -182,7 +182,7 @@ export class SystemVerilogIndexer {
     */
     public async onChange(document: TextDocument): Promise<any> {
         return new Promise(() => {
-            if (!isSystemVerilogDocument(document) && !isVerilogDocument(document)) {
+            if (!isSystemVerilogDocument(document) && !isVerilogDocument(document) && !isVerilogAMSDocument(document)) {
                 return;
             }
             if (!workspace.getConfiguration().get('systemverilog.enableIncrementalIndexing')) {
@@ -237,7 +237,7 @@ export class SystemVerilogIndexer {
                 return;
             }
 
-            if (!isSystemVerilogDocument(document) && !isVerilogDocument(document)) {
+            if (!isSystemVerilogDocument(document) && !isVerilogDocument(document) && !isVerilogAMSDocument(document)) {
                 resolve(new Array<SystemVerilogSymbol>());
                 return;
             }

src/utils/client.ts

@@ -7,7 +7,7 @@ import { TextDocument } from 'vscode';
     @return true if the document is a SystemVerilog file
 */
 export function isSystemVerilogDocument(document: TextDocument | undefined): boolean {
-    return document?.languageId === 'systemverilog';
+    return ((document?.languageId === 'systemverilog') || (document?.languageId === 'systemverilogheader'));
 }
 
 /**
@@ -17,5 +17,15 @@ export function isSystemVerilogDocument(document: TextDocument | undefined): boo
     @return true if the document is a Verilog file
 */
 export function isVerilogDocument(document: TextDocument | undefined): boolean {
-    return document?.languageId === 'verilog';
+    return ((document?.languageId === 'verilog') || (document?.languageId === 'verilogheader'));
 }
+
+/**
+    Check if a given `document` is a VerilogA/VerilogAMS file.
+
+    @param document the document to check
+    @return true if the document is a Verilog file
+*/
+export function isVerilogAMSDocument(document: TextDocument | undefined): boolean {
+    return ((document?.languageId === 'veriloga') || (document?.languageId === 'verilogams'));
+}

src/utils/server.ts

@@ -8,7 +8,7 @@ import { TextDocument } from 'vscode-languageserver-textdocument';
     @return true if the document is a SystemVerilog file
 */
 export function isSystemVerilogDocument(document: TextDocument | undefined): boolean {
-    return document?.languageId === 'systemverilog';
+    return ((document?.languageId === 'systemverilog') || (document?.languageId === 'systemverilogheader'));
 }
 
 /**
@@ -18,7 +18,17 @@ export function isSystemVerilogDocument(document: TextDocument | undefined): boo
     @return true if the document is a Verilog file
 */
 export function isVerilogDocument(document: TextDocument | undefined): boolean {
-    return document?.languageId === 'verilog';
+    return ((document?.languageId === 'verilog') || (document?.languageId === 'verilogheader'));;
+}
+
+/**
+    Check if a given `document` is a Verilog file.
+
+    @param document the document to check
+    @return true if the document is a Verilog file
+*/
+export function isVerilogAMSDocument(document: TextDocument | undefined): boolean {
+    return ((document?.languageId === 'veriloga') || (document?.languageId === 'verilogams'));;
 }
 
 /**