From 9374cc49c68287da2350b128ab27f41688de48e1 Mon Sep 17 00:00:00 2001 From: Nascs Date: Tue, 26 Mar 2024 08:00:21 +0000 Subject: [PATCH] platform: fix the pwm function of radxa boards Signed-off-by: Nascs --- include/arm/radxa_cm5_io.h | 2 +- include/arm/radxa_rock_3c.h | 2 +- include/arm/radxa_rock_5b.h | 2 +- src/arm/radxa_cm3.c | 3 ++- src/arm/radxa_cm5_io.c | 10 ++++++++-- src/arm/radxa_rock_3a.c | 4 ++-- src/arm/radxa_rock_3c.c | 6 +----- src/arm/radxa_rock_5a.c | 6 +++--- src/arm/radxa_rock_5b.c | 2 +- 9 files changed, 20 insertions(+), 17 deletions(-) diff --git a/include/arm/radxa_cm5_io.h b/include/arm/radxa_cm5_io.h index 5eee8ed5e..993c259ab 100644 --- a/include/arm/radxa_cm5_io.h +++ b/include/arm/radxa_cm5_io.h @@ -17,7 +17,7 @@ extern "C" { #define MRAA_RADXA_CM5_IO_I2C_COUNT 4 #define MRAA_RADXA_CM5_IO_SPI_COUNT 1 #define MRAA_RADXA_CM5_IO_UART_COUNT 2 -#define MRAA_RADXA_CM5_IO_PWM_COUNT 7 +#define MRAA_RADXA_CM5_IO_PWM_COUNT 9 #define MRAA_RADXA_CM5_IO_AIO_COUNT 1 #define MRAA_RADXA_CM5_IO_PIN_COUNT 40 #define PLATFORM_NAME_RADXA_CM5_IO "Radxa CM5 IO" diff --git a/include/arm/radxa_rock_3c.h b/include/arm/radxa_rock_3c.h index 75701937b..62b294ee9 100644 --- a/include/arm/radxa_rock_3c.h +++ b/include/arm/radxa_rock_3c.h @@ -17,7 +17,7 @@ extern "C" { #define MRAA_RADXA_ROCK_3C_I2C_COUNT 2 #define MRAA_RADXA_ROCK_3C_SPI_COUNT 1 #define MRAA_RADXA_ROCK_3C_UART_COUNT 5 -#define MRAA_RADXA_ROCK_3C_PWM_COUNT 7 +#define MRAA_RADXA_ROCK_3C_PWM_COUNT 6 #define MRAA_RADXA_ROCK_3C_AIO_COUNT 0 #define MRAA_RADXA_ROCK_3C_PIN_COUNT 40 #define PLATFORM_NAME_RADXA_ROCK_3C "Radxa ROCK3 Model C" diff --git a/include/arm/radxa_rock_5b.h b/include/arm/radxa_rock_5b.h index bfedf8fc8..6da45d94f 100644 --- a/include/arm/radxa_rock_5b.h +++ b/include/arm/radxa_rock_5b.h @@ -17,7 +17,7 @@ extern "C" { #define MRAA_RADXA_ROCK_5B_I2C_COUNT 4 #define MRAA_RADXA_ROCK_5B_SPI_COUNT 2 #define MRAA_RADXA_ROCK_5B_UART_COUNT 4 -#define MRAA_RADXA_ROCK_5B_PWM_COUNT 10 +#define MRAA_RADXA_ROCK_5B_PWM_COUNT 14 #define MRAA_RADXA_ROCK_5B_AIO_COUNT 1 #define MRAA_RADXA_ROCK_5B_PIN_COUNT 40 #define PLATFORM_NAME_RADXA_ROCK_5B "Radxa ROCK 5B" diff --git a/src/arm/radxa_cm3.c b/src/arm/radxa_cm3.c index c2485f834..c6f074bfb 100644 --- a/src/arm/radxa_cm3.c +++ b/src/arm/radxa_cm3.c @@ -110,7 +110,8 @@ mraa_radxa_cm3() b->pins[31].pwm.mux_total = 0; b->pins[32].pwm.parent_id = 11; // pwm11-m1 b->pins[32].pwm.mux_total = 0; - b->pins[33].pwm.parent_id = 15; // pwm7 + b->pins[32].pwm.pinmap = 0; + b->pins[33].pwm.parent_id = 7; // pwm7 b->pins[33].pwm.mux_total = 0; b->pins[37].pwm.parent_id = 3; // pwm3 b->pins[37].pwm.mux_total = 0; diff --git a/src/arm/radxa_cm5_io.c b/src/arm/radxa_cm5_io.c index 4b294758c..1b3945ed5 100644 --- a/src/arm/radxa_cm5_io.c +++ b/src/arm/radxa_cm5_io.c @@ -90,12 +90,18 @@ mraa_radxa_cm5_io() return NULL; } + b->pins[3].pwm.parent_id = 10; // PWM10-M2 + b->pins[3].pwm.mux_total = 0; + b->pins[3].pwm.pinmap = 0; b->pins[16].pwm.parent_id = 11; // PWM11-M0 b->pins[16].pwm.mux_total = 0; b->pins[16].pwm.pinmap = 0; - b->pins[24].pwm.parent_id = 11; // PWM14-M1 + b->pins[24].pwm.parent_id = 14; // PWM14-M1 b->pins[24].pwm.mux_total = 0; b->pins[24].pwm.pinmap = 0; + b->pins[28].pwm.parent_id = 14; // PWM14-M2 + b->pins[28].pwm.mux_total = 0; + b->pins[28].pwm.pinmap = 0; b->pins[29].pwm.parent_id = 7; // PWM7-M0 b->pins[29].pwm.mux_total = 0; b->pins[29].pwm.pinmap = 0; @@ -123,7 +129,7 @@ mraa_radxa_cm5_io() mraa_radxa_cm5_io_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID"); mraa_radxa_cm5_io_pininfo(b, 1, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3"); mraa_radxa_cm5_io_pininfo(b, 2, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V"); - mraa_radxa_cm5_io_pininfo(b, 3, 3, 27, (mraa_pincapabilities_t){1,1,0,0,1,1,0,0}, "GPIO3_D3"); + mraa_radxa_cm5_io_pininfo(b, 3, 3, 27, (mraa_pincapabilities_t){1,1,1,0,1,1,0,0}, "GPIO3_D3"); mraa_radxa_cm5_io_pininfo(b, 4, -1, -1, (mraa_pincapabilities_t){1,0,0,0, 0,0,0,0}, "5V"); mraa_radxa_cm5_io_pininfo(b, 5, 3, 26, (mraa_pincapabilities_t){1,1,0,0,1,1,0,0}, "GPIO3_D2"); mraa_radxa_cm5_io_pininfo(b, 6, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); diff --git a/src/arm/radxa_rock_3a.c b/src/arm/radxa_rock_3a.c index 78497a23e..927d6adf8 100644 --- a/src/arm/radxa_rock_3a.c +++ b/src/arm/radxa_rock_3a.c @@ -99,8 +99,6 @@ mraa_radxa_rock_3a() return NULL; } - b->pins[7].pwm.parent_id = 12; // PWM12_M0 - b->pins[7].pwm.mux_total = 0; b->pins[7].pwm.parent_id = 1; // PWM1_M1 b->pins[7].pwm.mux_total = 0; b->pins[11].pwm.parent_id = 14; // PWM14_M0 @@ -117,6 +115,8 @@ mraa_radxa_rock_3a() b->pins[19].pwm.mux_total = 0; b->pins[21].pwm.parent_id = 12; // PWM12_M1 b->pins[21].pwm.mux_total = 0; + b->pins[22].pwm.parent_id = 2; // PWM2_M0 + b->pins[22].pwm.mux_total = 0; b->pins[23].pwm.parent_id = 14; // PWM14_M1 b->pins[23].pwm.mux_total = 0; b->pins[24].pwm.parent_id = 13; // PWM13_M1 diff --git a/src/arm/radxa_rock_3c.c b/src/arm/radxa_rock_3c.c index 62e979e8f..b70ced982 100644 --- a/src/arm/radxa_rock_3c.c +++ b/src/arm/radxa_rock_3c.c @@ -96,14 +96,10 @@ mraa_radxa_rock_3c() b->pins[7].pwm.parent_id = 14; // pwm14-m0 b->pins[7].pwm.mux_total = 0; - b->pins[13].pwm.parent_id = 15; // pwm15-m0 - b->pins[13].pwm.mux_total = 0; b->pins[16].pwm.parent_id = 8; // pwm8-m0 b->pins[16].pwm.mux_total = 0; b->pins[18].pwm.parent_id = 9; // pwm9-m0 b->pins[18].pwm.mux_total = 0; - b->pins[19].pwm.parent_id = 15; // pwm15-m1 - b->pins[19].pwm.mux_total = 0; b->pins[21].pwm.parent_id = 12; // pwm12-m1 b->pins[21].pwm.mux_total = 0; b->pins[23].pwm.parent_id = 14; // pwm14-m1 @@ -130,7 +126,7 @@ mraa_radxa_rock_3c() mraa_radxa_rock_3c_pininfo(b, 16, 3, 9, (mraa_pincapabilities_t){1,1,1,0,0,0,0,1}, "GPIO03_B1"); mraa_radxa_rock_3c_pininfo(b, 17, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3"); mraa_radxa_rock_3c_pininfo(b, 18, 3, 10, (mraa_pincapabilities_t){1,1,1,0,0,0,0,1}, "GPIO3_B2"); - mraa_radxa_rock_3c_pininfo(b, 19, 4, 19, (mraa_pincapabilities_t){1,1,1,0,1,0,0,0}, "GPIO4_C3"); + mraa_radxa_rock_3c_pininfo(b, 19, 4, 19, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO4_C3"); // Pwm 15 channel 0 used by fan0 mraa_radxa_rock_3c_pininfo(b, 20, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); mraa_radxa_rock_3c_pininfo(b, 21, 4, 21, (mraa_pincapabilities_t){1,1,1,0,1,0,0,1}, "GPIO4_C5"); mraa_radxa_rock_3c_pininfo(b, 22, 3, 17, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO3_C1"); diff --git a/src/arm/radxa_rock_5a.c b/src/arm/radxa_rock_5a.c index 852dc6f50..15b71f82a 100644 --- a/src/arm/radxa_rock_5a.c +++ b/src/arm/radxa_rock_5a.c @@ -116,15 +116,15 @@ mraa_radxa_rock_5a() b->pins[23].pwm.parent_id = 0; // PWM0_M2 b->pins[23].pwm.mux_total = 0; b->pins[23].pwm.pinmap = 0; + b->pins[24].pwm.parent_id = 1; // PWM1_M2 + b->pins[24].pwm.mux_total = 0; + b->pins[24].pwm.pinmap = 0; b->pins[27].pwm.parent_id = 6; // PWM6_M0 b->pins[27].pwm.mux_total = 0; b->pins[27].pwm.pinmap = 0; b->pins[28].pwm.parent_id = 7; // PWM7_M0 b->pins[28].pwm.mux_total = 0; b->pins[28].pwm.pinmap = 0; - b->pins[28].pwm.parent_id = 1; // PWM1_M2 - b->pins[28].pwm.mux_total = 0; - b->pins[28].pwm.pinmap = 0; // AIO b->aio_count = MRAA_RADXA_ROCK_5A_AIO_COUNT; diff --git a/src/arm/radxa_rock_5b.c b/src/arm/radxa_rock_5b.c index 80b276ea4..ddf563701 100644 --- a/src/arm/radxa_rock_5b.c +++ b/src/arm/radxa_rock_5b.c @@ -108,7 +108,7 @@ mraa_radxa_rock_5b() b->pins[28].pwm.parent_id = 6; // PWM6_M2 b->pins[28].pwm.mux_total = 0; b->pins[28].pwm.pinmap = 0; - b->pins[29].pwm.parent_id = 7; // PWM15_M3 + b->pins[29].pwm.parent_id = 15; // PWM15_M3 b->pins[29].pwm.mux_total = 0; b->pins[29].pwm.pinmap = 0; b->pins[31].pwm.parent_id = 13; // PWM13_M2