From 6030ea2858ab0cf9d2d25e92e7ed93cc9af13120 Mon Sep 17 00:00:00 2001 From: KONNO Kazuhiro Date: Thu, 1 Aug 2019 12:21:34 +0900 Subject: [PATCH] AArch64: Add ARM64CondTrg1Src2Instruction to ARM64Debug.cpp This commit adds support for a new instruction kind, ARM64CondTrg1Src2Instruction, to ARM64Debug.cpp. Signed-off-by: KONNO Kazuhiro --- compiler/aarch64/codegen/ARM64Debug.cpp | 20 ++++++++++++++++++++ compiler/ras/Debug.hpp | 2 ++ 2 files changed, 22 insertions(+) diff --git a/compiler/aarch64/codegen/ARM64Debug.cpp b/compiler/aarch64/codegen/ARM64Debug.cpp index d04df85054..c8fecc39a5 100644 --- a/compiler/aarch64/codegen/ARM64Debug.cpp +++ b/compiler/aarch64/codegen/ARM64Debug.cpp @@ -552,6 +552,9 @@ TR_Debug::print(TR::FILE *pOutFile, TR::Instruction *instr) case OMR::Instruction::IsTrg1Src2: print(pOutFile, (TR::ARM64Trg1Src2Instruction *)instr); break; + case OMR::Instruction::IsCondTrg1Src2: + print(pOutFile, (TR::ARM64CondTrg1Src2Instruction *)instr); + break; case OMR::Instruction::IsTrg1Src2Shifted: print(pOutFile, (TR::ARM64Trg1Src2ShiftedInstruction *)instr); break; @@ -803,6 +806,23 @@ TR_Debug::print(TR::FILE *pOutFile, TR::ARM64Trg1Src2Instruction *instr) trfflush(_comp->getOutFile()); } +void +TR_Debug::print(TR::FILE *pOutFile, TR::ARM64CondTrg1Src2Instruction *instr) + { + printPrefix(pOutFile, instr); + trfprintf(pOutFile, "%s \t", getOpCodeName(&instr->getOpCode())); + + print(pOutFile, instr->getTargetRegister(), TR_WordReg); trfprintf(pOutFile, ", "); + print(pOutFile, instr->getSource1Register(), TR_WordReg); trfprintf(pOutFile, ", "); + print(pOutFile, instr->getSource2Register(), TR_WordReg); + trfprintf(pOutFile, ", %s", ARM64ConditionNames[instr->getConditionCode()]); + + if (instr->getDependencyConditions()) + print(pOutFile, instr->getDependencyConditions()); + + trfflush(_comp->getOutFile()); + } + void TR_Debug::print(TR::FILE *pOutFile, TR::ARM64Trg1Src2ShiftedInstruction *instr) { diff --git a/compiler/ras/Debug.hpp b/compiler/ras/Debug.hpp index 00ad76b8a6..038880c5e2 100644 --- a/compiler/ras/Debug.hpp +++ b/compiler/ras/Debug.hpp @@ -345,6 +345,7 @@ namespace TR { class ARM64Trg1ImmInstruction; } namespace TR { class ARM64Trg1Src1Instruction; } namespace TR { class ARM64Trg1Src1ImmInstruction; } namespace TR { class ARM64Trg1Src2Instruction; } +namespace TR { class ARM64CondTrg1Src2Instruction; } namespace TR { class ARM64Trg1Src2ShiftedInstruction; } namespace TR { class ARM64Trg1Src2ExtendedInstruction; } namespace TR { class ARM64Trg1Src3Instruction; } @@ -1085,6 +1086,7 @@ class TR_Debug void print(TR::FILE *, TR::ARM64Trg1Src1Instruction *); void print(TR::FILE *, TR::ARM64Trg1Src1ImmInstruction *); void print(TR::FILE *, TR::ARM64Trg1Src2Instruction *); + void print(TR::FILE *, TR::ARM64CondTrg1Src2Instruction *); void print(TR::FILE *, TR::ARM64Trg1Src2ShiftedInstruction *); void print(TR::FILE *, TR::ARM64Trg1Src2ExtendedInstruction *); void print(TR::FILE *, TR::ARM64Trg1Src3Instruction *);