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AArch64: Add ARM64CondTrg1Src2Instruction to ARM64Debug.cpp #4185

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Aug 2, 2019
Merged

AArch64: Add ARM64CondTrg1Src2Instruction to ARM64Debug.cpp #4185

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20 changes: 20 additions & 0 deletions compiler/aarch64/codegen/ARM64Debug.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -552,6 +552,9 @@ TR_Debug::print(TR::FILE *pOutFile, TR::Instruction *instr)
case OMR::Instruction::IsTrg1Src2:
print(pOutFile, (TR::ARM64Trg1Src2Instruction *)instr);
break;
case OMR::Instruction::IsCondTrg1Src2:
print(pOutFile, (TR::ARM64CondTrg1Src2Instruction *)instr);
break;
case OMR::Instruction::IsTrg1Src2Shifted:
print(pOutFile, (TR::ARM64Trg1Src2ShiftedInstruction *)instr);
break;
Expand Down Expand Up @@ -803,6 +806,23 @@ TR_Debug::print(TR::FILE *pOutFile, TR::ARM64Trg1Src2Instruction *instr)
trfflush(_comp->getOutFile());
}

void
TR_Debug::print(TR::FILE *pOutFile, TR::ARM64CondTrg1Src2Instruction *instr)
{
printPrefix(pOutFile, instr);
trfprintf(pOutFile, "%s \t", getOpCodeName(&instr->getOpCode()));

print(pOutFile, instr->getTargetRegister(), TR_WordReg); trfprintf(pOutFile, ", ");
print(pOutFile, instr->getSource1Register(), TR_WordReg); trfprintf(pOutFile, ", ");
print(pOutFile, instr->getSource2Register(), TR_WordReg);
trfprintf(pOutFile, ", %s", ARM64ConditionNames[instr->getConditionCode()]);

if (instr->getDependencyConditions())
print(pOutFile, instr->getDependencyConditions());

trfflush(_comp->getOutFile());
}

void
TR_Debug::print(TR::FILE *pOutFile, TR::ARM64Trg1Src2ShiftedInstruction *instr)
{
Expand Down
2 changes: 2 additions & 0 deletions compiler/ras/Debug.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -345,6 +345,7 @@ namespace TR { class ARM64Trg1ImmInstruction; }
namespace TR { class ARM64Trg1Src1Instruction; }
namespace TR { class ARM64Trg1Src1ImmInstruction; }
namespace TR { class ARM64Trg1Src2Instruction; }
namespace TR { class ARM64CondTrg1Src2Instruction; }
namespace TR { class ARM64Trg1Src2ShiftedInstruction; }
namespace TR { class ARM64Trg1Src2ExtendedInstruction; }
namespace TR { class ARM64Trg1Src3Instruction; }
Expand Down Expand Up @@ -1085,6 +1086,7 @@ class TR_Debug
void print(TR::FILE *, TR::ARM64Trg1Src1Instruction *);
void print(TR::FILE *, TR::ARM64Trg1Src1ImmInstruction *);
void print(TR::FILE *, TR::ARM64Trg1Src2Instruction *);
void print(TR::FILE *, TR::ARM64CondTrg1Src2Instruction *);
void print(TR::FILE *, TR::ARM64Trg1Src2ShiftedInstruction *);
void print(TR::FILE *, TR::ARM64Trg1Src2ExtendedInstruction *);
void print(TR::FILE *, TR::ARM64Trg1Src3Instruction *);
Expand Down