From ee1f73a48221e69b1e574f5fa627b0e2fd2f2459 Mon Sep 17 00:00:00 2001 From: Harry Yu Date: Thu, 13 Feb 2020 17:05:16 -0500 Subject: [PATCH] Add Post Initialization for class Z::CPU After the construction of the CPU class, the processor type and processor features are "true values" from the port library. Post initialization will change some of the values there needed for the compiler. Issue: #4339 Signed-off-by: Harry Yu --- compiler/z/env/OMRCPU.cpp | 56 ++++++++++++++++++++++++++++++++++++++- compiler/z/env/OMRCPU.hpp | 2 -- 2 files changed, 55 insertions(+), 3 deletions(-) diff --git a/compiler/z/env/OMRCPU.cpp b/compiler/z/env/OMRCPU.cpp index 574972383e9..51e32f61299 100644 --- a/compiler/z/env/OMRCPU.cpp +++ b/compiler/z/env/OMRCPU.cpp @@ -112,7 +112,60 @@ OMR::Z::CPU::CPU() : OMR::CPU(), _supportedArch(z9) - {} + { + } + +OMR::Z::CPU::postInitialization() + { + if (self()->isAtLeast(OMR_PROCESSOR_S390_Z10) && TR::Options::getCmdLineOptions()->getOption(TR_DisableZ10)) + self()->setProcessorType(OMR_PROCESSOR_S390_FIRST); + else if (self()->isAtLeast(OMR_PROCESSOR_S390_Z196) && TR::Options::getCmdLineOptions()->getOption(TR_DisableZ196)) + self()->setProcessorType(OMR_PROCESSOR_S390_Z10); + else if (self()->isAtLeast(OMR_PROCESSOR_S390_ZEC12) && TR::Options::getCmdLineOptions()->getOption(TR_DisableZEC12)) + self()->setProcessorType(OMR_PROCESSOR_S390_Z196); + else if (self()->isAtLeast(OMR_PROCESSOR_S390_Z13) && TR::Options::getCmdLineOptions()->getOption(TR_DisableZ13)) + self()->setProcessorType(OMR_PROCESSOR_S390_ZEC12); + else if (self()->isAtLeast(OMR_PROCESSOR_S390_Z14) && TR::Options::getCmdLineOptions()->getOption(TR_DisableZ14)) + self()->setProcessorType(OMR_PROCESSOR_S390_Z13); + else if (self()->isAtLeast(OMR_PROCESSOR_S390_Z15) && TR::Options::getCmdLineOptions()->getOption(TR_DisableZ15)) + self()->setProcessorType(OMR_PROCESSOR_S390_Z14); + else if (self()->isAtLeast(OMR_PROCESSOR_S390_ZNEXT) && TR::Options::getCmdLineOptions()->getOption(TR_DisableZNext)) + self()->setProcessorType(OMR_PROCESSOR_S390_Z15); + + if (!self()->isAtLeast(OMR_PROCESSOR_S390_Z10)) + { + self()->disableFeature(OMR_FEATURE_S390_DFP); + } + + if (!self()->isAtLeast(OMR_PROCESSOR_S390_Z196)) + { + self()->disableFeature(OMR_FEATURE_S390_HIGH_WORD); + } + + if (!self()->isAtLeast(OMR_PROCESSOR_S390_ZEC12)) + { + self()->disableFeature(OMR_FEATURE_S390_TE); + self()->disableFeature(OMR_FEATURE_S390_RI); + } + + if (!self()->isAtLeast(OMR_PROCESSOR_S390_Z13)) + { + self()->disableFeature(OMR_FEATURE_S390_VECTOR_FACILITY); + } + + if (!self()->isAtLeast(OMR_PROCESSOR_S390_Z14)) + { + self()->disableFeature(OMR_FEATURE_S390_VECTOR_PACKED_DECIMAL); + self()->disableFeature(OMR_FEATURE_S390_GUARDED_STORAGE); + } + + if (!self()->isAtLeast(OMR_PROCESSOR_S390_Z15)) + { + self()->disableFeature(OMR_FEATURE_S390_MISCELLANEOUS_INSTRUCTION_EXTENSION_3); + self()->disableFeature(OMR_FEATURE_S390_VECTOR_FACILITY_ENHANCEMENT_2); + self()->disableFeature(OMR_FEATURE_S390_VECTOR_PACKED_DECIMAL_ENHANCEMENT_FACILITY); + } + } bool OMR::Z::CPU::getSupportsArch(Architecture arch) @@ -403,3 +456,4 @@ OMR::Z::CPU::isTargetWithinBranchRelativeRILRange(intptrj_t targetAddress, intpt return (targetAddress == sourceAddress + ((intptrj_t)((int32_t)((targetAddress - sourceAddress) / 2))) * 2) && (targetAddress % 2 == 0); } + diff --git a/compiler/z/env/OMRCPU.hpp b/compiler/z/env/OMRCPU.hpp index 7f5ea350b39..5d12cfc9d98 100644 --- a/compiler/z/env/OMRCPU.hpp +++ b/compiler/z/env/OMRCPU.hpp @@ -262,8 +262,6 @@ class CPU : public OMR::CPU CPU(); - protected: - enum { // Available = 0x00000001,