From 95dacb07a5e8512bebb6e1550dd60a585c6e26f9 Mon Sep 17 00:00:00 2001
From: Akira Saitoh <saiaki@jp.ibm.com>
Date: Fri, 22 Nov 2019 18:03:57 +0900
Subject: [PATCH] AArch64: Add AOT relocation to address constant

This commit changes aconstEvaluator to add AOT relocation
to address constant.

Signed-off-by: Akira Saitoh <saiaki@jp.ibm.com>
---
 compiler/aarch64/codegen/OMRCodeGenerator.hpp | 12 ++++++++
 compiler/aarch64/codegen/OMRTreeEvaluator.cpp | 10 +++++++
 compiler/aarch64/codegen/UnaryEvaluator.cpp   | 28 ++++++++++++++++---
 3 files changed, 46 insertions(+), 4 deletions(-)

diff --git a/compiler/aarch64/codegen/OMRCodeGenerator.hpp b/compiler/aarch64/codegen/OMRCodeGenerator.hpp
index fc42654e561..835ccaa6f34 100644
--- a/compiler/aarch64/codegen/OMRCodeGenerator.hpp
+++ b/compiler/aarch64/codegen/OMRCodeGenerator.hpp
@@ -37,6 +37,7 @@ namespace OMR { typedef OMR::ARM64::CodeGenerator CodeGeneratorConnector; }
 
 #include "codegen/RegisterConstants.hpp"
 #include "infra/Annotations.hpp"
+#include "runtime/Runtime.hpp"
 
 class TR_ARM64OutOfLineCodeSection;
 namespace TR { class ARM64LinkageProperties; }
@@ -63,6 +64,17 @@ extern TR::Instruction *loadConstant64(TR::CodeGenerator *cg, TR::Node *node, in
 
 extern TR::Instruction *loadAddressConstant(TR::CodeGenerator *cg, TR::Node *node, intptr_t value, TR::Register *trgReg, TR::Instruction *cursor=NULL, bool isPicSite=false, int16_t typeAddress=-1);
 
+ /* @brief Generates instruction for loading address constant to register using constant data snippet
+ * @param[in] cg : CodeGenerator
+ * @param[in] node: node
+ * @param[in] address : address
+ * @param[in] trgReg : target register
+ * @param[in] reloKind : relocation kind
+ * @param[in] cursor : instruction cursor
+ * @return generated instruction
+ */
+extern TR::Instruction *loadAddressConstantInSnippet(TR::CodeGenerator *cg, TR::Node *node, intptrj_t address, TR::Register *trgReg, TR_ExternalRelocationTargetKind reloKind, TR::Instruction *cursor=NULL);
+
 /**
  * @brief Helper function for encoding immediate value of logic instructions.
  * @param[in] value : immediate value to encode
diff --git a/compiler/aarch64/codegen/OMRTreeEvaluator.cpp b/compiler/aarch64/codegen/OMRTreeEvaluator.cpp
index fc394820c22..4494e0f60b6 100644
--- a/compiler/aarch64/codegen/OMRTreeEvaluator.cpp
+++ b/compiler/aarch64/codegen/OMRTreeEvaluator.cpp
@@ -22,6 +22,7 @@
 #include "codegen/ARM64Instruction.hpp"
 #include "codegen/ARM64ShiftCode.hpp"
 #include "codegen/CodeGenerator.hpp"
+#include "codegen/ConstantDataSnippet.hpp"
 #include "codegen/GenerateInstructions.hpp"
 #include "codegen/Linkage.hpp"
 #include "codegen/Linkage_inlines.hpp"
@@ -36,6 +37,15 @@
 #include "il/ParameterSymbol.hpp"
 #include "il/StaticSymbol.hpp"
 
+TR::Instruction *loadAddressConstantInSnippet(TR::CodeGenerator *cg, TR::Node *node, intptrj_t address, TR::Register *targetRegister, TR_ExternalRelocationTargetKind reloKind, TR::Instruction *cursor)
+   {
+   // We use LDR literal to load a value from the snippet. Offset to PC will be patched by LabelRelative24BitRelocation
+   auto snippet = cg->findOrCreate8ByteConstant(node, address);
+   auto labelSym = snippet->getSnippetLabel();
+   snippet->setReloType(reloKind);
+   return generateTrg1ImmSymInstruction(cg, TR::InstOpCode::ldrx, node, targetRegister, 0, labelSym, cursor);
+   }
+
 TR::Instruction *loadConstant32(TR::CodeGenerator *cg, TR::Node *node, int32_t value, TR::Register *trgReg, TR::Instruction *cursor)
    {
    TR::Instruction *insertingInstructions = cursor;
diff --git a/compiler/aarch64/codegen/UnaryEvaluator.cpp b/compiler/aarch64/codegen/UnaryEvaluator.cpp
index d69185984b5..c57da1f03be 100644
--- a/compiler/aarch64/codegen/UnaryEvaluator.cpp
+++ b/compiler/aarch64/codegen/UnaryEvaluator.cpp
@@ -20,6 +20,7 @@
  *******************************************************************************/
 
 #include "codegen/CodeGenerator.hpp"
+#include "codegen/ConstantDataSnippet.hpp"
 #include "codegen/GenerateInstructions.hpp"
 #include "codegen/TreeEvaluator.hpp"
 #include "il/Node.hpp"
@@ -55,10 +56,29 @@ TR::Register *OMR::ARM64::TreeEvaluator::cconstEvaluator(TR::Node *node, TR::Cod
 
 TR::Register *OMR::ARM64::TreeEvaluator::aconstEvaluator(TR::Node *node, TR::CodeGenerator *cg)
    {
-   TR::Register *tempReg = cg->allocateRegister();
-   intptrj_t address = node->getLongInt();
-   loadConstant64(cg, node, address, tempReg);
-   return node->setRegister(tempReg);
+   if (cg->profiledPointersRequireRelocation() &&
+         (node->isMethodPointerConstant() || node->isClassPointerConstant()))
+      {
+      TR::Register *trgReg = node->setRegister(cg->allocateRegister());
+      TR_ExternalRelocationTargetKind reloKind = TR_NoRelocation;
+      if (node->isMethodPointerConstant())
+         {
+         reloKind = TR_MethodPointer;
+         if (node->getInlinedSiteIndex() == -1)
+            reloKind = TR_RamMethod;
+         }
+      else if (node->isClassPointerConstant())
+         reloKind = TR_ClassPointer;
+
+      TR_ASSERT(reloKind != TR_NoRelocation, "relocation kind shouldn't be TR_NoRelocation");
+      loadAddressConstantInSnippet(cg, node, node->getAddress(), trgReg, reloKind);
+
+      return trgReg;
+      }
+
+   TR::Register *tempReg = node->setRegister(cg->allocateRegister());
+   loadConstant64(cg, node, node->getAddress(), tempReg, NULL);
+   return tempReg;
    }
 
 TR::Register *OMR::ARM64::TreeEvaluator::lconstEvaluator(TR::Node *node, TR::CodeGenerator *cg)