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arc-opc.c
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/* Opcode table for the ARC.
Copyright 1994, 1995, 1997, 1998, 2000, 2001, 2002, 2004, 2005, 2007
Free Software Foundation, Inc.
Contributed by Doug Evans (dje@cygnus.com).
This file is part of libopcodes.
This library is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
It is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#include "sysdep.h"
#include <stdio.h>
#include "ansidecl.h"
#include "bfd.h"
#include "opcode/arc.h"
#include "opintl.h"
enum operand {OP_NONE,OP_REG,OP_SHIMM,OP_LIMM};
#define OPERANDS 3
enum operand ls_operand[OPERANDS];
struct arc_opcode *arc_ext_opcodes;
struct arc_ext_operand_value *arc_ext_operands;
#define LS_VALUE 0
#define LS_DEST 0
#define LS_BASE 1
#define LS_OFFSET 2
/* Given a format letter, yields the index into `arc_operands'.
eg: arc_operand_map['a'] = REGA. */
unsigned char arc_operand_map[256];
/* Nonzero if we've seen an 'f' suffix (in certain insns). */
static int flag_p;
/* Nonzero if we've finished processing the 'f' suffix. */
static int flagshimm_handled_p;
/* Nonzero if we've seen a 'a' suffix (address writeback). */
static int addrwb_p;
/* Nonzero if we've seen a 'q' suffix (condition code). */
static int cond_p;
/* Nonzero if we've inserted a nullify condition. */
static int nullify_p;
/* The value of the a nullify condition we inserted. */
static int nullify;
/* Nonzero if we've inserted jumpflags. */
static int jumpflags_p;
/* Nonzero if we've inserted a shimm. */
static int shimm_p;
/* The value of the shimm we inserted (each insn only gets one but it can
appear multiple times). */
static int shimm;
/* Nonzero if we've inserted a limm (during assembly) or seen a limm
(during disassembly). */
static int limm_p;
/* The value of the limm we inserted. Each insn only gets one but it can
appear multiple times. */
static long limm;
#define INSERT_FN(fn) \
static arc_insn fn (arc_insn, const struct arc_operand *, \
int, const struct arc_operand_value *, long, \
const char **)
#define EXTRACT_FN(fn) \
static long fn (arc_insn *, const struct arc_operand *, \
int, const struct arc_operand_value **, int *)
INSERT_FN (insert_reg);
INSERT_FN (insert_shimmfinish);
INSERT_FN (insert_limmfinish);
INSERT_FN (insert_offset);
INSERT_FN (insert_base);
INSERT_FN (insert_st_syntax);
INSERT_FN (insert_ld_syntax);
INSERT_FN (insert_addr_wb);
INSERT_FN (insert_flag);
INSERT_FN (insert_nullify);
INSERT_FN (insert_flagfinish);
INSERT_FN (insert_cond);
INSERT_FN (insert_forcelimm);
INSERT_FN (insert_reladdr);
INSERT_FN (insert_absaddr);
INSERT_FN (insert_jumpflags);
INSERT_FN (insert_unopmacro);
EXTRACT_FN (extract_reg);
EXTRACT_FN (extract_ld_offset);
EXTRACT_FN (extract_ld_syntax);
EXTRACT_FN (extract_st_offset);
EXTRACT_FN (extract_st_syntax);
EXTRACT_FN (extract_flag);
EXTRACT_FN (extract_cond);
EXTRACT_FN (extract_reladdr);
EXTRACT_FN (extract_jumpflags);
EXTRACT_FN (extract_unopmacro);
/* Various types of ARC operands, including insn suffixes. */
/* Insn format values:
'a' REGA register A field
'b' REGB register B field
'c' REGC register C field
'S' SHIMMFINISH finish inserting a shimm value
'L' LIMMFINISH finish inserting a limm value
'o' OFFSET offset in st insns
'O' OFFSET offset in ld insns
'0' SYNTAX_ST_NE enforce store insn syntax, no errors
'1' SYNTAX_LD_NE enforce load insn syntax, no errors
'2' SYNTAX_ST enforce store insn syntax, errors, last pattern only
'3' SYNTAX_LD enforce load insn syntax, errors, last pattern only
's' BASE base in st insn
'f' FLAG F flag
'F' FLAGFINISH finish inserting the F flag
'G' FLAGINSN insert F flag in "flag" insn
'n' DELAY N field (nullify field)
'q' COND condition code field
'Q' FORCELIMM set `cond_p' to 1 to ensure a constant is a limm
'B' BRANCH branch address (22 bit pc relative)
'J' JUMP jump address (26 bit absolute)
'j' JUMPFLAGS optional high order bits of 'J'
'z' SIZE1 size field in ld a,[b,c]
'Z' SIZE10 size field in ld a,[b,shimm]
'y' SIZE22 size field in st c,[b,shimm]
'x' SIGN0 sign extend field ld a,[b,c]
'X' SIGN9 sign extend field ld a,[b,shimm]
'w' ADDRESS3 write-back field in ld a,[b,c]
'W' ADDRESS12 write-back field in ld a,[b,shimm]
'v' ADDRESS24 write-back field in st c,[b,shimm]
'e' CACHEBYPASS5 cache bypass in ld a,[b,c]
'E' CACHEBYPASS14 cache bypass in ld a,[b,shimm]
'D' CACHEBYPASS26 cache bypass in st c,[b,shimm]
'U' UNOPMACRO fake operand to copy REGB to REGC for unop macros
The following modifiers may appear between the % and char (eg: %.f):
'.' MODDOT '.' prefix must be present
'r' REG generic register value, for register table
'A' AUXREG auxiliary register in lr a,[b], sr c,[b]
Fields are:
CHAR BITS SHIFT FLAGS INSERT_FN EXTRACT_FN */
const struct arc_operand arc_operands[] =
{
/* Place holder (??? not sure if needed). */
#define UNUSED 0
{ 0, 0, 0, 0, 0, 0 },
/* Register A or shimm/limm indicator. */
#define REGA (UNUSED + 1)
{ 'a', 6, ARC_SHIFT_REGA, ARC_OPERAND_SIGNED | ARC_OPERAND_ERROR, insert_reg, extract_reg },
/* Register B or shimm/limm indicator. */
#define REGB (REGA + 1)
{ 'b', 6, ARC_SHIFT_REGB, ARC_OPERAND_SIGNED | ARC_OPERAND_ERROR, insert_reg, extract_reg },
/* Register C or shimm/limm indicator. */
#define REGC (REGB + 1)
{ 'c', 6, ARC_SHIFT_REGC, ARC_OPERAND_SIGNED | ARC_OPERAND_ERROR, insert_reg, extract_reg },
/* Fake operand used to insert shimm value into most instructions. */
#define SHIMMFINISH (REGC + 1)
{ 'S', 9, 0, ARC_OPERAND_SIGNED + ARC_OPERAND_FAKE, insert_shimmfinish, 0 },
/* Fake operand used to insert limm value into most instructions. */
#define LIMMFINISH (SHIMMFINISH + 1)
{ 'L', 32, 32, ARC_OPERAND_ADDRESS + ARC_OPERAND_LIMM + ARC_OPERAND_FAKE, insert_limmfinish, 0 },
/* Shimm operand when there is no reg indicator (st). */
#define ST_OFFSET (LIMMFINISH + 1)
{ 'o', 9, 0, ARC_OPERAND_LIMM | ARC_OPERAND_SIGNED | ARC_OPERAND_STORE, insert_offset, extract_st_offset },
/* Shimm operand when there is no reg indicator (ld). */
#define LD_OFFSET (ST_OFFSET + 1)
{ 'O', 9, 0,ARC_OPERAND_LIMM | ARC_OPERAND_SIGNED | ARC_OPERAND_LOAD, insert_offset, extract_ld_offset },
/* Operand for base. */
#define BASE (LD_OFFSET + 1)
{ 's', 6, ARC_SHIFT_REGB, ARC_OPERAND_LIMM | ARC_OPERAND_SIGNED, insert_base, extract_reg},
/* 0 enforce syntax for st insns. */
#define SYNTAX_ST_NE (BASE + 1)
{ '0', 9, 0, ARC_OPERAND_FAKE, insert_st_syntax, extract_st_syntax },
/* 1 enforce syntax for ld insns. */
#define SYNTAX_LD_NE (SYNTAX_ST_NE + 1)
{ '1', 9, 0, ARC_OPERAND_FAKE, insert_ld_syntax, extract_ld_syntax },
/* 0 enforce syntax for st insns. */
#define SYNTAX_ST (SYNTAX_LD_NE + 1)
{ '2', 9, 0, ARC_OPERAND_FAKE | ARC_OPERAND_ERROR, insert_st_syntax, extract_st_syntax },
/* 0 enforce syntax for ld insns. */
#define SYNTAX_LD (SYNTAX_ST + 1)
{ '3', 9, 0, ARC_OPERAND_FAKE | ARC_OPERAND_ERROR, insert_ld_syntax, extract_ld_syntax },
/* Flag update bit (insertion is defered until we know how). */
#define FLAG (SYNTAX_LD + 1)
{ 'f', 1, 8, ARC_OPERAND_SUFFIX, insert_flag, extract_flag },
/* Fake utility operand to finish 'f' suffix handling. */
#define FLAGFINISH (FLAG + 1)
{ 'F', 1, 8, ARC_OPERAND_FAKE, insert_flagfinish, 0 },
/* Fake utility operand to set the 'f' flag for the "flag" insn. */
#define FLAGINSN (FLAGFINISH + 1)
{ 'G', 1, 8, ARC_OPERAND_FAKE, insert_flag, 0 },
/* Branch delay types. */
#define DELAY (FLAGINSN + 1)
{ 'n', 2, 5, ARC_OPERAND_SUFFIX , insert_nullify, 0 },
/* Conditions. */
#define COND (DELAY + 1)
{ 'q', 5, 0, ARC_OPERAND_SUFFIX, insert_cond, extract_cond },
/* Set `cond_p' to 1 to ensure a constant is treated as a limm. */
#define FORCELIMM (COND + 1)
{ 'Q', 0, 0, ARC_OPERAND_FAKE, insert_forcelimm, 0 },
/* Branch address; b, bl, and lp insns. */
#define BRANCH (FORCELIMM + 1)
{ 'B', 20, 7, (ARC_OPERAND_RELATIVE_BRANCH + ARC_OPERAND_SIGNED) | ARC_OPERAND_ERROR, insert_reladdr, extract_reladdr },
/* Jump address; j insn (this is basically the same as 'L' except that the
value is right shifted by 2). */
#define JUMP (BRANCH + 1)
{ 'J', 24, 32, ARC_OPERAND_ERROR | (ARC_OPERAND_ABSOLUTE_BRANCH + ARC_OPERAND_LIMM + ARC_OPERAND_FAKE), insert_absaddr, 0 },
/* Jump flags; j{,l} insn value or'ed into 'J' addr for flag values. */
#define JUMPFLAGS (JUMP + 1)
{ 'j', 6, 26, ARC_OPERAND_JUMPFLAGS | ARC_OPERAND_ERROR, insert_jumpflags, extract_jumpflags },
/* Size field, stored in bit 1,2. */
#define SIZE1 (JUMPFLAGS + 1)
{ 'z', 2, 1, ARC_OPERAND_SUFFIX, 0, 0 },
/* Size field, stored in bit 10,11. */
#define SIZE10 (SIZE1 + 1)
{ 'Z', 2, 10, ARC_OPERAND_SUFFIX, 0, 0 },
/* Size field, stored in bit 22,23. */
#define SIZE22 (SIZE10 + 1)
{ 'y', 2, 22, ARC_OPERAND_SUFFIX, 0, 0 },
/* Sign extend field, stored in bit 0. */
#define SIGN0 (SIZE22 + 1)
{ 'x', 1, 0, ARC_OPERAND_SUFFIX, 0, 0 },
/* Sign extend field, stored in bit 9. */
#define SIGN9 (SIGN0 + 1)
{ 'X', 1, 9, ARC_OPERAND_SUFFIX, 0, 0 },
/* Address write back, stored in bit 3. */
#define ADDRESS3 (SIGN9 + 1)
{ 'w', 1, 3, ARC_OPERAND_SUFFIX, insert_addr_wb, 0},
/* Address write back, stored in bit 12. */
#define ADDRESS12 (ADDRESS3 + 1)
{ 'W', 1, 12, ARC_OPERAND_SUFFIX, insert_addr_wb, 0},
/* Address write back, stored in bit 24. */
#define ADDRESS24 (ADDRESS12 + 1)
{ 'v', 1, 24, ARC_OPERAND_SUFFIX, insert_addr_wb, 0},
/* Cache bypass, stored in bit 5. */
#define CACHEBYPASS5 (ADDRESS24 + 1)
{ 'e', 1, 5, ARC_OPERAND_SUFFIX, 0, 0 },
/* Cache bypass, stored in bit 14. */
#define CACHEBYPASS14 (CACHEBYPASS5 + 1)
{ 'E', 1, 14, ARC_OPERAND_SUFFIX, 0, 0 },
/* Cache bypass, stored in bit 26. */
#define CACHEBYPASS26 (CACHEBYPASS14 + 1)
{ 'D', 1, 26, ARC_OPERAND_SUFFIX, 0, 0 },
/* Unop macro, used to copy REGB to REGC. */
#define UNOPMACRO (CACHEBYPASS26 + 1)
{ 'U', 6, ARC_SHIFT_REGC, ARC_OPERAND_FAKE, insert_unopmacro, extract_unopmacro },
/* '.' modifier ('.' required). */
#define MODDOT (UNOPMACRO + 1)
{ '.', 1, 0, ARC_MOD_DOT, 0, 0 },
/* Dummy 'r' modifier for the register table.
It's called a "dummy" because there's no point in inserting an 'r' into all
the %a/%b/%c occurrences in the insn table. */
#define REG (MODDOT + 1)
{ 'r', 6, 0, ARC_MOD_REG, 0, 0 },
/* Known auxiliary register modifier (stored in shimm field). */
#define AUXREG (REG + 1)
{ 'A', 9, 0, ARC_MOD_AUXREG, 0, 0 },
/* End of list place holder. */
{ 0, 0, 0, 0, 0, 0 }
};
/* Insert a value into a register field.
If REG is NULL, then this is actually a constant.
We must also handle auxiliary registers for lr/sr insns. */
static arc_insn
insert_reg (arc_insn insn,
const struct arc_operand *operand,
int mods,
const struct arc_operand_value *reg,
long value,
const char **errmsg)
{
static char buf[100];
enum operand op_type = OP_NONE;
if (reg == NULL)
{
/* We have a constant that also requires a value stored in a register
field. Handle these by updating the register field and saving the
value for later handling by either %S (shimm) or %L (limm). */
/* Try to use a shimm value before a limm one. */
if (ARC_SHIMM_CONST_P (value)
/* If we've seen a conditional suffix we have to use a limm. */
&& !cond_p
/* If we already have a shimm value that is different than ours
we have to use a limm. */
&& (!shimm_p || shimm == value))
{
int marker;
op_type = OP_SHIMM;
/* Forget about shimm as dest mlm. */
if ('a' != operand->fmt)
{
shimm_p = 1;
shimm = value;
flagshimm_handled_p = 1;
marker = flag_p ? ARC_REG_SHIMM_UPDATE : ARC_REG_SHIMM;
}
else
{
/* Don't request flag setting on shimm as dest. */
marker = ARC_REG_SHIMM;
}
insn |= marker << operand->shift;
/* insn |= value & 511; - done later. */
}
/* We have to use a limm. If we've already seen one they must match. */
else if (!limm_p || limm == value)
{
op_type = OP_LIMM;
limm_p = 1;
limm = value;
insn |= ARC_REG_LIMM << operand->shift;
/* The constant is stored later. */
}
else
*errmsg = _("unable to fit different valued constants into instruction");
}
else
{
/* We have to handle both normal and auxiliary registers. */
if (reg->type == AUXREG)
{
if (!(mods & ARC_MOD_AUXREG))
*errmsg = _("auxiliary register not allowed here");
else
{
if ((insn & I(-1)) == I(2)) /* Check for use validity. */
{
if (reg->flags & ARC_REGISTER_READONLY)
*errmsg = _("attempt to set readonly register");
}
else
{
if (reg->flags & ARC_REGISTER_WRITEONLY)
*errmsg = _("attempt to read writeonly register");
}
insn |= ARC_REG_SHIMM << operand->shift;
insn |= reg->value << arc_operands[reg->type].shift;
}
}
else
{
/* check for use validity. */
if ('a' == operand->fmt || ((insn & I(-1)) < I(2)))
{
if (reg->flags & ARC_REGISTER_READONLY)
*errmsg = _("attempt to set readonly register");
}
if ('a' != operand->fmt)
{
if (reg->flags & ARC_REGISTER_WRITEONLY)
*errmsg = _("attempt to read writeonly register");
}
/* We should never get an invalid register number here. */
if ((unsigned int) reg->value > 60)
{
sprintf (buf, _("invalid register number `%d'"), reg->value);
*errmsg = buf;
}
insn |= reg->value << operand->shift;
op_type = OP_REG;
}
}
switch (operand->fmt)
{
case 'a':
ls_operand[LS_DEST] = op_type;
break;
case 's':
ls_operand[LS_BASE] = op_type;
break;
case 'c':
if ((insn & I(-1)) == I(2))
ls_operand[LS_VALUE] = op_type;
else
ls_operand[LS_OFFSET] = op_type;
break;
case 'o': case 'O':
ls_operand[LS_OFFSET] = op_type;
break;
}
return insn;
}
/* Called when we see an 'f' flag. */
static arc_insn
insert_flag (arc_insn insn,
const struct arc_operand *operand ATTRIBUTE_UNUSED,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
const char **errmsg ATTRIBUTE_UNUSED)
{
/* We can't store anything in the insn until we've parsed the registers.
Just record the fact that we've got this flag. `insert_reg' will use it
to store the correct value (ARC_REG_SHIMM_UPDATE or bit 0x100). */
flag_p = 1;
return insn;
}
/* Called when we see an nullify condition. */
static arc_insn
insert_nullify (arc_insn insn,
const struct arc_operand *operand,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value,
const char **errmsg ATTRIBUTE_UNUSED)
{
nullify_p = 1;
insn |= (value & ((1 << operand->bits) - 1)) << operand->shift;
nullify = value;
return insn;
}
/* Called after completely building an insn to ensure the 'f' flag gets set
properly. This is needed because we don't know how to set this flag until
we've parsed the registers. */
static arc_insn
insert_flagfinish (arc_insn insn,
const struct arc_operand *operand,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
const char **errmsg ATTRIBUTE_UNUSED)
{
if (flag_p && !flagshimm_handled_p)
{
if (shimm_p)
abort ();
flagshimm_handled_p = 1;
insn |= (1 << operand->shift);
}
return insn;
}
/* Called when we see a conditional flag (eg: .eq). */
static arc_insn
insert_cond (arc_insn insn,
const struct arc_operand *operand,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value,
const char **errmsg ATTRIBUTE_UNUSED)
{
cond_p = 1;
insn |= (value & ((1 << operand->bits) - 1)) << operand->shift;
return insn;
}
/* Used in the "j" instruction to prevent constants from being interpreted as
shimm values (which the jump insn doesn't accept). This can also be used
to force the use of limm values in other situations (eg: ld r0,[foo] uses
this).
??? The mechanism is sound. Access to it is a bit klunky right now. */
static arc_insn
insert_forcelimm (arc_insn insn,
const struct arc_operand *operand ATTRIBUTE_UNUSED,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
const char **errmsg ATTRIBUTE_UNUSED)
{
cond_p = 1;
return insn;
}
static arc_insn
insert_addr_wb (arc_insn insn,
const struct arc_operand *operand,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
const char **errmsg ATTRIBUTE_UNUSED)
{
addrwb_p = 1 << operand->shift;
return insn;
}
static arc_insn
insert_base (arc_insn insn,
const struct arc_operand *operand,
int mods,
const struct arc_operand_value *reg,
long value,
const char **errmsg)
{
if (reg != NULL)
{
arc_insn myinsn;
myinsn = insert_reg (0, operand,mods, reg, value, errmsg) >> operand->shift;
insn |= B(myinsn);
ls_operand[LS_BASE] = OP_REG;
}
else if (ARC_SHIMM_CONST_P (value) && !cond_p)
{
if (shimm_p && value != shimm)
{
/* Convert the previous shimm operand to a limm. */
limm_p = 1;
limm = shimm;
insn &= ~C(-1); /* We know where the value is in insn. */
insn |= C(ARC_REG_LIMM);
ls_operand[LS_VALUE] = OP_LIMM;
}
insn |= ARC_REG_SHIMM << operand->shift;
shimm_p = 1;
shimm = value;
ls_operand[LS_BASE] = OP_SHIMM;
ls_operand[LS_OFFSET] = OP_SHIMM;
}
else
{
if (limm_p && value != limm)
{
*errmsg = _("too many long constants");
return insn;
}
limm_p = 1;
limm = value;
insn |= B(ARC_REG_LIMM);
ls_operand[LS_BASE] = OP_LIMM;
}
return insn;
}
/* Used in ld/st insns to handle the offset field. We don't try to
match operand syntax here. we catch bad combinations later. */
static arc_insn
insert_offset (arc_insn insn,
const struct arc_operand *operand,
int mods,
const struct arc_operand_value *reg,
long value,
const char **errmsg)
{
long minval, maxval;
if (reg != NULL)
{
arc_insn myinsn;
myinsn = insert_reg (0,operand,mods,reg,value,errmsg) >> operand->shift;
ls_operand[LS_OFFSET] = OP_REG;
if (operand->flags & ARC_OPERAND_LOAD) /* Not if store, catch it later. */
if ((insn & I(-1)) != I(1)) /* Not if opcode == 1, catch it later. */
insn |= C (myinsn);
}
else
{
/* This is *way* more general than necessary, but maybe some day it'll
be useful. */
if (operand->flags & ARC_OPERAND_SIGNED)
{
minval = -(1 << (operand->bits - 1));
maxval = (1 << (operand->bits - 1)) - 1;
}
else
{
minval = 0;
maxval = (1 << operand->bits) - 1;
}
if ((cond_p && !limm_p) || (value < minval || value > maxval))
{
if (limm_p && value != limm)
*errmsg = _("too many long constants");
else
{
limm_p = 1;
limm = value;
if (operand->flags & ARC_OPERAND_STORE)
insn |= B(ARC_REG_LIMM);
if (operand->flags & ARC_OPERAND_LOAD)
insn |= C(ARC_REG_LIMM);
ls_operand[LS_OFFSET] = OP_LIMM;
}
}
else
{
if ((value < minval || value > maxval))
*errmsg = "need too many limms";
else if (shimm_p && value != shimm)
{
/* Check for bad operand combinations
before we lose info about them. */
if ((insn & I(-1)) == I(1))
{
*errmsg = _("too many shimms in load");
goto out;
}
if (limm_p && operand->flags & ARC_OPERAND_LOAD)
{
*errmsg = _("too many long constants");
goto out;
}
/* Convert what we thought was a shimm to a limm. */
limm_p = 1;
limm = shimm;
if (ls_operand[LS_VALUE] == OP_SHIMM
&& operand->flags & ARC_OPERAND_STORE)
{
insn &= ~C(-1);
insn |= C(ARC_REG_LIMM);
ls_operand[LS_VALUE] = OP_LIMM;
}
if (ls_operand[LS_BASE] == OP_SHIMM
&& operand->flags & ARC_OPERAND_STORE)
{
insn &= ~B(-1);
insn |= B(ARC_REG_LIMM);
ls_operand[LS_BASE] = OP_LIMM;
}
}
shimm = value;
shimm_p = 1;
ls_operand[LS_OFFSET] = OP_SHIMM;
}
}
out:
return insn;
}
/* Used in st insns to do final disasemble syntax check. */
static long
extract_st_syntax (arc_insn *insn,
const struct arc_operand *operand ATTRIBUTE_UNUSED,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value **opval ATTRIBUTE_UNUSED,
int *invalid)
{
#define ST_SYNTAX(V,B,O) \
((ls_operand[LS_VALUE] == (V) && \
ls_operand[LS_BASE] == (B) && \
ls_operand[LS_OFFSET] == (O)))
if (!((ST_SYNTAX(OP_REG,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
|| ST_SYNTAX(OP_REG,OP_LIMM,OP_NONE)
|| (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
|| (ST_SYNTAX(OP_SHIMM,OP_SHIMM,OP_NONE) && (insn[0] & 511) == 0)
|| ST_SYNTAX(OP_SHIMM,OP_LIMM,OP_NONE)
|| ST_SYNTAX(OP_SHIMM,OP_LIMM,OP_SHIMM)
|| ST_SYNTAX(OP_SHIMM,OP_SHIMM,OP_SHIMM)
|| (ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
|| ST_SYNTAX(OP_REG,OP_REG,OP_SHIMM)
|| ST_SYNTAX(OP_REG,OP_SHIMM,OP_SHIMM)
|| ST_SYNTAX(OP_SHIMM,OP_REG,OP_SHIMM)
|| ST_SYNTAX(OP_LIMM,OP_SHIMM,OP_SHIMM)
|| ST_SYNTAX(OP_LIMM,OP_SHIMM,OP_NONE)
|| ST_SYNTAX(OP_LIMM,OP_REG,OP_SHIMM)))
*invalid = 1;
return 0;
}
int
arc_limm_fixup_adjust (arc_insn insn)
{
int retval = 0;
/* Check for st shimm,[limm]. */
if ((insn & (I(-1) | C(-1) | B(-1))) ==
(I(2) | C(ARC_REG_SHIMM) | B(ARC_REG_LIMM)))
{
retval = insn & 0x1ff;
if (retval & 0x100) /* Sign extend 9 bit offset. */
retval |= ~0x1ff;
}
return -retval; /* Negate offset for return. */
}
/* Used in st insns to do final syntax check. */
static arc_insn
insert_st_syntax (arc_insn insn,
const struct arc_operand *operand ATTRIBUTE_UNUSED,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
const char **errmsg)
{
if (ST_SYNTAX (OP_SHIMM,OP_REG,OP_NONE) && shimm != 0)
{
/* Change an illegal insn into a legal one, it's easier to
do it here than to try to handle it during operand scan. */
limm_p = 1;
limm = shimm;
shimm_p = 0;
shimm = 0;
insn = insn & ~(C(-1) | 511);
insn |= ARC_REG_LIMM << ARC_SHIFT_REGC;
ls_operand[LS_VALUE] = OP_LIMM;
}
if (ST_SYNTAX (OP_REG, OP_SHIMM, OP_NONE)
|| ST_SYNTAX (OP_LIMM, OP_SHIMM, OP_NONE))
{
/* Try to salvage this syntax. */
if (shimm & 0x1) /* Odd shimms won't work. */
{
if (limm_p) /* Do we have a limm already? */
*errmsg = _("impossible store");
limm_p = 1;
limm = shimm;
shimm = 0;
shimm_p = 0;
insn = insn & ~(B(-1) | 511);
insn |= B(ARC_REG_LIMM);
ls_operand[LS_BASE] = OP_LIMM;
}
else
{
shimm >>= 1;
insn = insn & ~511;
insn |= shimm;
ls_operand[LS_OFFSET] = OP_SHIMM;
}
}
if (ST_SYNTAX(OP_SHIMM,OP_LIMM,OP_NONE))
limm += arc_limm_fixup_adjust(insn);
if (! (ST_SYNTAX (OP_REG,OP_REG,OP_NONE)
|| ST_SYNTAX (OP_REG,OP_LIMM,OP_NONE)
|| ST_SYNTAX (OP_REG,OP_REG,OP_SHIMM)
|| ST_SYNTAX (OP_REG,OP_SHIMM,OP_SHIMM)
|| (ST_SYNTAX (OP_SHIMM,OP_SHIMM,OP_NONE) && (shimm == 0))
|| ST_SYNTAX (OP_SHIMM,OP_LIMM,OP_NONE)
|| ST_SYNTAX (OP_SHIMM,OP_REG,OP_NONE)
|| ST_SYNTAX (OP_SHIMM,OP_REG,OP_SHIMM)
|| ST_SYNTAX (OP_SHIMM,OP_SHIMM,OP_SHIMM)
|| ST_SYNTAX (OP_LIMM,OP_SHIMM,OP_SHIMM)
|| ST_SYNTAX (OP_LIMM,OP_REG,OP_NONE)
|| ST_SYNTAX (OP_LIMM,OP_REG,OP_SHIMM)))
*errmsg = _("st operand error");
if (addrwb_p)
{
if (ls_operand[LS_BASE] != OP_REG)
*errmsg = _("address writeback not allowed");
insn |= addrwb_p;
}
if (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && shimm)
*errmsg = _("store value must be zero");
return insn;
}
/* Used in ld insns to do final syntax check. */
static arc_insn
insert_ld_syntax (arc_insn insn,
const struct arc_operand *operand ATTRIBUTE_UNUSED,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
const char **errmsg)
{
#define LD_SYNTAX(D, B, O) \
( (ls_operand[LS_DEST] == (D) \
&& ls_operand[LS_BASE] == (B) \
&& ls_operand[LS_OFFSET] == (O)))
int test = insn & I (-1);
if (!(test == I (1)))
{
if ((ls_operand[LS_DEST] == OP_SHIMM || ls_operand[LS_BASE] == OP_SHIMM
|| ls_operand[LS_OFFSET] == OP_SHIMM))
*errmsg = _("invalid load/shimm insn");
}
if (!(LD_SYNTAX(OP_REG,OP_REG,OP_NONE)
|| LD_SYNTAX(OP_REG,OP_REG,OP_REG)
|| LD_SYNTAX(OP_REG,OP_REG,OP_SHIMM)
|| (LD_SYNTAX(OP_REG,OP_LIMM,OP_REG) && !(test == I(1)))
|| (LD_SYNTAX(OP_REG,OP_REG,OP_LIMM) && !(test == I(1)))
|| LD_SYNTAX(OP_REG,OP_SHIMM,OP_SHIMM)
|| (LD_SYNTAX(OP_REG,OP_LIMM,OP_NONE) && (test == I(1)))))
*errmsg = _("ld operand error");
if (addrwb_p)
{
if (ls_operand[LS_BASE] != OP_REG)
*errmsg = _("address writeback not allowed");
insn |= addrwb_p;
}
return insn;
}
/* Used in ld insns to do final syntax check. */
static long
extract_ld_syntax (arc_insn *insn,
const struct arc_operand *operand ATTRIBUTE_UNUSED,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value **opval ATTRIBUTE_UNUSED,
int *invalid)
{
int test = insn[0] & I(-1);
if (!(test == I(1)))
{
if ((ls_operand[LS_DEST] == OP_SHIMM || ls_operand[LS_BASE] == OP_SHIMM
|| ls_operand[LS_OFFSET] == OP_SHIMM))
*invalid = 1;
}
if (!( (LD_SYNTAX (OP_REG, OP_REG, OP_NONE) && (test == I(1)))
|| LD_SYNTAX (OP_REG, OP_REG, OP_REG)
|| LD_SYNTAX (OP_REG, OP_REG, OP_SHIMM)
|| (LD_SYNTAX (OP_REG, OP_REG, OP_LIMM) && !(test == I(1)))
|| (LD_SYNTAX (OP_REG, OP_LIMM, OP_REG) && !(test == I(1)))
|| (LD_SYNTAX (OP_REG, OP_SHIMM, OP_NONE) && (shimm == 0))
|| LD_SYNTAX (OP_REG, OP_SHIMM, OP_SHIMM)
|| (LD_SYNTAX (OP_REG, OP_LIMM, OP_NONE) && (test == I(1)))))
*invalid = 1;
return 0;
}
/* Called at the end of processing normal insns (eg: add) to insert a shimm
value (if present) into the insn. */
static arc_insn
insert_shimmfinish (arc_insn insn,
const struct arc_operand *operand,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
const char **errmsg ATTRIBUTE_UNUSED)
{
if (shimm_p)
insn |= (shimm & ((1 << operand->bits) - 1)) << operand->shift;
return insn;
}
/* Called at the end of processing normal insns (eg: add) to insert a limm
value (if present) into the insn.
Note that this function is only intended to handle instructions (with 4 byte
immediate operands). It is not intended to handle data. */
/* ??? Actually, there's nothing for us to do as we can't call frag_more, the
caller must do that. The extract fns take a pointer to two words. The
insert fns could be converted and then we could do something useful, but
then the reloc handlers would have to know to work on the second word of
a 2 word quantity. That's too much so we don't handle them. */
static arc_insn
insert_limmfinish (arc_insn insn,
const struct arc_operand *operand ATTRIBUTE_UNUSED,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
const char **errmsg ATTRIBUTE_UNUSED)
{
return insn;
}
static arc_insn
insert_jumpflags (arc_insn insn,
const struct arc_operand *operand,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value,
const char **errmsg)
{
if (!flag_p)
*errmsg = _("jump flags, but no .f seen");
else if (!limm_p)
*errmsg = _("jump flags, but no limm addr");
else if (limm & 0xfc000000)
*errmsg = _("flag bits of jump address limm lost");
else if (limm & 0x03000000)
*errmsg = _("attempt to set HR bits");
else if ((value & ((1 << operand->bits) - 1)) != value)
*errmsg = _("bad jump flags value");
jumpflags_p = 1;
limm = ((limm & ((1 << operand->shift) - 1))
| ((value & ((1 << operand->bits) - 1)) << operand->shift));
return insn;
}
/* Called at the end of unary operand macros to copy the B field to C. */
static arc_insn
insert_unopmacro (arc_insn insn,
const struct arc_operand *operand,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value ATTRIBUTE_UNUSED,
const char **errmsg ATTRIBUTE_UNUSED)
{
insn |= ((insn >> ARC_SHIFT_REGB) & ARC_MASK_REG) << operand->shift;
return insn;
}
/* Insert a relative address for a branch insn (b, bl, or lp). */
static arc_insn
insert_reladdr (arc_insn insn,
const struct arc_operand *operand,
int mods ATTRIBUTE_UNUSED,
const struct arc_operand_value *reg ATTRIBUTE_UNUSED,
long value,
const char **errmsg)
{
if (value & 3)
*errmsg = _("branch address not on 4 byte boundary");
insn |= ((value >> 2) & ((1 << operand->bits) - 1)) << operand->shift;
return insn;
}
/* Insert a limm value as a 26 bit address right shifted 2 into the insn.
Note that this function is only intended to handle instructions (with 4 byte
immediate operands). It is not intended to handle data. */
/* ??? Actually, there's little for us to do as we can't call frag_more, the
caller must do that. The extract fns take a pointer to two words. The
insert fns could be converted and then we could do something useful, but