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Processor.cpp
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/*
* Gearsystem - Sega Master System / Game Gear Emulator
* Copyright (C) 2013 Ignacio Sanchez
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License
* along with this program. If not, see http://www.gnu.org/licenses/
*
*/
#include <algorithm>
#include <ctype.h>
#include "Processor.h"
#include "opcode_timing.h"
#include "opcode_names.h"
#include "IOPorts.h"
Processor::Processor(Memory* pMemory)
{
m_pMemory = pMemory;
m_pMemory->SetProcessor(this);
InitPointer(m_pIOPorts);
InitOPCodeFunctors();
m_bIFF1 = false;
m_bIFF2 = false;
m_bHalt = false;
m_bBranchTaken = false;
m_iTStates = 0;
m_iInjectedTStates = 0;
m_bAfterEI = false;
m_iInterruptMode = 0;
m_bINTRequested = false;
m_bNMIRequested = false;
m_bPrefixedCBOpcode = false;
m_PrefixedCBValue = 0;
m_bInputLastCycle = false;
m_ProActionReplayList.clear();
m_bBreakpointHit = false;
m_bRequestMemBreakpoint = false;
m_ProcessorState.AF = &AF;
m_ProcessorState.BC = &BC;
m_ProcessorState.DE = &DE;
m_ProcessorState.HL = &HL;
m_ProcessorState.AF2 = &AF2;
m_ProcessorState.BC2 = &BC2;
m_ProcessorState.DE2 = &DE2;
m_ProcessorState.HL2 = &HL2;
m_ProcessorState.IX = &IX;
m_ProcessorState.IY = &IY;
m_ProcessorState.SP = &SP;
m_ProcessorState.PC = &PC;
m_ProcessorState.WZ = &WZ;
m_ProcessorState.I = &I;
m_ProcessorState.R = &R;
m_ProcessorState.IFF1 = &m_bIFF1;
m_ProcessorState.IFF2 = &m_bIFF2;
m_ProcessorState.Halt = &m_bHalt;
m_ProcessorState.NMI = &m_bNMIRequested;
m_ProcessorState.INT = &m_bINTRequested;
}
Processor::~Processor()
{
}
void Processor::Init()
{
Reset();
}
void Processor::Reset()
{
m_bIFF1 = false;
m_bIFF2 = false;
m_bHalt = false;
m_bBranchTaken = false;
m_iTStates = 0;
m_iInjectedTStates = 0;
m_bAfterEI = false;
m_iInterruptMode = 1;
PC.SetValue(0x0000);
SP.SetValue(0xDFF0);
IX.SetValue(0xFFFF);
IY.SetValue(0xFFFF);
AF.SetValue(0x0040); // Zero flag set
BC.SetValue(0x0000);
DE.SetValue(0x0000);
HL.SetValue(0x0000);
AF2.SetValue(0x0000);
BC2.SetValue(0x0000);
DE2.SetValue(0x0000);
HL2.SetValue(0x0000);
WZ.SetValue(0x0000);
I = 0x00;
R = 0x00;
m_bINTRequested = false;
m_bNMIRequested = false;
m_bPrefixedCBOpcode = false;
m_PrefixedCBValue = 0;
m_bInputLastCycle = false;
m_ProActionReplayList.clear();
m_bBreakpointHit = false;
m_bRequestMemBreakpoint = false;
}
void Processor::SetIOPOrts(IOPorts* pIOPorts)
{
m_pIOPorts = pIOPorts;
}
IOPorts* Processor::GetIOPOrts()
{
return m_pIOPorts;
}
unsigned int Processor::RunFor(unsigned int tstates)
{
u8 executed = 0;
while (executed < tstates)
{
m_iTStates = 0;
m_bBreakpointHit = false;
m_bRequestMemBreakpoint = false;
if (!m_bInputLastCycle)
{
if (m_bNMIRequested)
{
LeaveHalt();
m_bNMIRequested = false;
m_bIFF1 = false;
StackPush(&PC);
PC.SetValue(0x0066);
m_iTStates += 11;
IncreaseR();
WZ.SetValue(PC.GetValue());
DisassembleNextOpcode();
return m_iTStates;
}
else if (m_bIFF1 && m_bINTRequested && !m_bAfterEI)
{
LeaveHalt();
m_bIFF1 = false;
m_bIFF2 = false;
StackPush(&PC);
PC.SetValue(0x0038);
m_iTStates += 13;
IncreaseR();
WZ.SetValue(PC.GetValue());
UpdateProActionReplay();
DisassembleNextOpcode();
return m_iTStates;
}
m_bAfterEI = false;
}
ExecuteOPCode();
DisassembleNextOpcode();
executed += m_iTStates;
if (m_iInjectedTStates > 0)
{
executed += m_iInjectedTStates;
m_iInjectedTStates = 0;
}
}
return executed;
}
void Processor::InjectTStates(unsigned int tstates)
{
m_iInjectedTStates += tstates;
}
void Processor::RequestINT(bool assert)
{
m_bINTRequested = assert;
}
void Processor::RequestNMI()
{
m_bNMIRequested = true;
}
void Processor::ExecuteOPCode()
{
u8 opcode = FetchOPCode();
switch (opcode)
{
case 0xDD:
case 0xFD:
{
int more_prefixes = false;
while ((opcode == 0xDD) || (opcode == 0xFD))
{
m_CurrentPrefix = opcode;
opcode = FetchOPCode();
if (more_prefixes)
m_iTStates += 4;
more_prefixes = true;
IncreaseR();
}
break;
}
default:
{
m_CurrentPrefix = 0x00;
break;
}
}
switch (opcode)
{
case 0xCB:
{
IncreaseR();
if (IsPrefixedInstruction())
{
m_bPrefixedCBOpcode = true;
m_PrefixedCBValue = m_pMemory->Read(PC.GetValue());
PC.Increment();
}
else
IncreaseR();
opcode = FetchOPCode();
(this->*m_OPCodesCB[opcode])();
if (IsPrefixedInstruction())
{
m_iTStates += kOPCodeXYCBTStates[opcode];
m_bPrefixedCBOpcode = false;
}
else
m_iTStates += kOPCodeCBTStates[opcode];
break;
}
case 0xED:
{
IncreaseR();
IncreaseR();
m_CurrentPrefix = 0x00;
opcode = FetchOPCode();
(this->*m_OPCodesED[opcode])();
m_iTStates += kOPCodeEDTStates[opcode];
break;
}
default:
{
if (!m_bInputLastCycle)
IncreaseR();
(this->*m_OPCodes[opcode])();
if (IsPrefixedInstruction())
m_iTStates += kOPCodeXYTStates[opcode];
else
m_iTStates += kOPCodeTStates[opcode];
if (m_bBranchTaken)
{
m_bBranchTaken = false;
m_iTStates += kOPCodeTStatesBranched[opcode];
}
break;
}
}
}
void Processor::InvalidOPCode()
{
#ifdef DEBUG_GEARSYSTEM
u16 opcode_address = PC.GetValue() - 1;
u16 prefix_address = PC.GetValue() - 2;
u8 opcode = m_pMemory->Read(opcode_address);
u8 prefix = m_pMemory->Read(prefix_address);
switch (prefix)
{
case 0xCB:
{
Debug("--> ** INVALID CB OP Code (%X) at $%.4X -- %s", opcode, opcode_address, kOPCodeCBNames[opcode]);
break;
}
case 0xED:
{
Debug("--> ** INVALID ED OP Code (%X) at $%.4X -- %s", opcode, opcode_address, kOPCodeEDNames[opcode]);
break;
}
default:
{
Debug("--> ** INVALID OP Code (%X) at $%.4X -- %s", opcode, opcode_address, kOPCodeNames[opcode]);
}
}
#endif
}
void Processor::UndocumentedOPCode()
{
#ifdef DEBUG_GEARSYSTEM
u16 opcode_address = PC.GetValue() - 1;
u8 opcode = m_pMemory->Read(opcode_address);
Debug("--> ** UNDOCUMENTED OP Code (%X) at $%.4X -- %s", opcode, opcode_address, kOPCodeNames[opcode]);
#endif
}
void Processor::DisassembleNextOpcode()
{
#ifndef GEARSYSTEM_DISABLE_DISASSEMBLER
if (Disassemble(PC.GetValue()) || m_bRequestMemBreakpoint)
m_bBreakpointHit = true;
#endif
}
bool Processor::Disassemble(u16 address)
{
Memory::stDisassembleRecord** memoryMap = m_pMemory->GetDisassembledMemoryMap();
Memory::stDisassembleRecord** romMap = m_pMemory->GetDisassembledROMMemoryMap();
Memory::stDisassembleRecord** map = NULL;
int offset = address;
int bank = 0;
bool rom = false;
if (m_pMemory->GetCurrentRule()->Has8kBanks())
{
if (address < 0xC000)
{
int slot = (address >> 13) & 0x07;
bank = m_pMemory->GetCurrentRule()->GetBank(slot);
offset = (0x2000 * bank) + (address & 0x1FFF);
map = romMap;
rom = true;
}
else
{
map = memoryMap;
rom = false;
}
}
else
{
if (address < 0xC000)
{
int slot = (address >> 14) & 0x03;
bank = m_pMemory->GetCurrentRule()->GetBank(slot);
offset = (0x4000 * bank) + (address & 0x3FFF);
map = romMap;
rom = true;
}
else
{
map = memoryMap;
rom = false;
}
}
if (!IsValidPointer(map[offset]))
{
map[offset] = new Memory::stDisassembleRecord;
if (rom)
{
map[offset]->address = offset & 0x3FFF;
map[offset]->bank = offset >> 14;
}
else
{
map[offset]->address = offset;
map[offset]->bank = 0;
}
map[offset]->name[0] = 0;
map[offset]->bytes[0] = 0;
map[offset]->size = 0;
for (int i = 0; i < 4; i++)
map[offset]->opcodes[i] = 0;
map[offset]->jump = false;
map[offset]->jump_address = 0;
}
u8 opcodes[6];
bool changed = false;
int maxSize = std::min(map[offset]->size, 4);
for (int i = 0; i < maxSize; i++)
{
opcodes[i] = m_pMemory->Read(address + i);
if (opcodes[i] != map[offset]->opcodes[i])
changed = true;
}
if ((map[offset]->size == 0) || changed)
{
map[offset]->bank = bank;
map[offset]->address = address;
std::vector<u8> bytes;
u16 opcode_temp_addr = address;
u8 opcode_temp = m_pMemory->Read(opcode_temp_addr);
u8 ddfd_mod = 0;
int first = 0;
while ((opcode_temp == 0xDD) || (opcode_temp == 0xFD))
{
ddfd_mod = opcode_temp;
bytes.push_back(opcode_temp);
opcode_temp_addr++;
first++;
opcode_temp = m_pMemory->Read(opcode_temp_addr);
}
for (int i = 0; i < 5; i++)
bytes.push_back(m_pMemory->Read(opcode_temp_addr + i));
u8 opcode = bytes[first];
stOPCodeInfo info;
bool prefixed = false;
if (opcode == 0xCB)
{
prefixed = true;
if (ddfd_mod == 0xDD)
{
opcode = bytes[first + 2];
info = kOPCodeDDCBNames[opcode];
}
else if (ddfd_mod == 0xFD)
{
opcode = bytes[first + 2];
info = kOPCodeFDCBNames[opcode];
}
else
{
opcode = bytes[first + 1];
info = kOPCodeCBNames[opcode];
}
}
else if (opcode == 0xED)
{
prefixed = true;
opcode = bytes[first + 1];
info = kOPCodeEDNames[opcode];
}
else
{
if (ddfd_mod == 0xDD)
info = kOPCodeDDNames[opcode];
else if (ddfd_mod == 0xFD)
info = kOPCodeFDNames[opcode];
else
info = kOPCodeNames[opcode];
}
map[offset]->size = info.size + (first > 1 ? (first - 1) : 0);
map[offset]->bytes[0] = 0;
for (int i = 0; i < (int)bytes.size(); i++)
{
if (i < map[offset]->size)
{
char value[8];
snprintf(value, sizeof(value), "%02X", bytes[i]);
strcat(map[offset]->bytes, value);
strcat(map[offset]->bytes, " ");
}
else if (i < 4)
{
strcat(map[offset]->bytes, " ");
}
if (i < 4)
map[offset]->opcodes[i] = bytes[i];
}
first += prefixed ? 1 : 0;
switch (info.type)
{
case 0:
strcpy(map[offset]->name, info.name);
break;
case 1:
snprintf(map[offset]->name, sizeof(map[offset]->name), info.name, bytes[first]);
break;
case 2:
snprintf(map[offset]->name, sizeof(map[offset]->name), info.name, bytes[first + 1]);
break;
case 3:
map[offset]->jump = true;
map[offset]->jump_address = (bytes[first + 2] << 8) | bytes[first + 1];
snprintf(map[offset]->name, sizeof(map[offset]->name), info.name, map[offset]->jump_address);
break;
case 4:
snprintf(map[offset]->name, sizeof(map[offset]->name), info.name, (s8)bytes[first + 1]);
break;
case 5:
map[offset]->jump = true;
map[offset]->jump_address = address + info.size + (s8)bytes[first + 1];
snprintf(map[offset]->name, sizeof(map[offset]->name), info.name, map[offset]->jump_address, (s8)bytes[first + 1]);
break;
case 6:
snprintf(map[offset]->name, sizeof(map[offset]->name), info.name, (s8)bytes[first + 1], bytes[first + 2]);
break;
default:
strcpy(map[offset]->name, "PARSE ERROR");
}
}
Memory::stDisassembleRecord* runtobreakpoint = m_pMemory->GetRunToBreakpoint();
std::vector<Memory::stDisassembleRecord*>* breakpoints = m_pMemory->GetBreakpointsCPU();
if (IsValidPointer(runtobreakpoint))
{
if (runtobreakpoint == map[offset])
{
m_pMemory->SetRunToBreakpoint(NULL);
return true;
}
else
return false;
}
else
{
std::size_t size = breakpoints->size();
for (std::size_t b = 0; b < size; b++)
{
if ((*breakpoints)[b] == map[offset])
{
return true;
}
}
}
return false;
}
bool Processor::BreakpointHit()
{
return m_bBreakpointHit;
}
bool Processor::Halted()
{
return m_bHalt;
}
void Processor::RequestMemoryBreakpoint()
{
m_bRequestMemBreakpoint = true;
}
void Processor::SaveState(std::ostream& stream)
{
using namespace std;
u16 af = AF.GetValue();
u16 bc = BC.GetValue();
u16 de = DE.GetValue();
u16 hl = HL.GetValue();
u16 af2 = AF2.GetValue();
u16 bc2 = BC2.GetValue();
u16 de2 = DE2.GetValue();
u16 hl2 = HL2.GetValue();
u16 sp = SP.GetValue();
u16 pc = PC.GetValue();
u16 ix = IX.GetValue();
u16 iy = IY.GetValue();
u16 wz = WZ.GetValue();
u8 i = I;
u8 r = R;
stream.write(reinterpret_cast<const char*> (&af), sizeof(af));
stream.write(reinterpret_cast<const char*> (&bc), sizeof(bc));
stream.write(reinterpret_cast<const char*> (&de), sizeof(de));
stream.write(reinterpret_cast<const char*> (&hl), sizeof(hl));
stream.write(reinterpret_cast<const char*> (&af2), sizeof(af2));
stream.write(reinterpret_cast<const char*> (&bc2), sizeof(bc2));
stream.write(reinterpret_cast<const char*> (&de2), sizeof(de2));
stream.write(reinterpret_cast<const char*> (&hl2), sizeof(hl2));
stream.write(reinterpret_cast<const char*> (&sp), sizeof(sp));
stream.write(reinterpret_cast<const char*> (&pc), sizeof(pc));
stream.write(reinterpret_cast<const char*> (&ix), sizeof(ix));
stream.write(reinterpret_cast<const char*> (&iy), sizeof(iy));
stream.write(reinterpret_cast<const char*> (&wz), sizeof(wz));
stream.write(reinterpret_cast<const char*> (&i), sizeof(i));
stream.write(reinterpret_cast<const char*> (&r), sizeof(r));
stream.write(reinterpret_cast<const char*> (&m_bIFF1), sizeof(m_bIFF1));
stream.write(reinterpret_cast<const char*> (&m_bIFF2), sizeof(m_bIFF2));
stream.write(reinterpret_cast<const char*> (&m_bHalt), sizeof(m_bHalt));
stream.write(reinterpret_cast<const char*> (&m_bBranchTaken), sizeof(m_bBranchTaken));
stream.write(reinterpret_cast<const char*> (&m_iTStates), sizeof(m_iTStates));
stream.write(reinterpret_cast<const char*> (&m_bAfterEI), sizeof(m_bAfterEI));
stream.write(reinterpret_cast<const char*> (&m_iInterruptMode), sizeof(m_iInterruptMode));
stream.write(reinterpret_cast<const char*> (&m_CurrentPrefix), sizeof(m_CurrentPrefix));
stream.write(reinterpret_cast<const char*> (&m_bINTRequested), sizeof(m_bINTRequested));
stream.write(reinterpret_cast<const char*> (&m_bNMIRequested), sizeof(m_bNMIRequested));
stream.write(reinterpret_cast<const char*> (&m_bPrefixedCBOpcode), sizeof(m_bPrefixedCBOpcode));
stream.write(reinterpret_cast<const char*> (&m_PrefixedCBValue), sizeof(m_PrefixedCBValue));
stream.write(reinterpret_cast<const char*> (&m_bInputLastCycle), sizeof(m_bInputLastCycle));
}
void Processor::LoadState(std::istream& stream)
{
using namespace std;
u16 af, bc, de, hl, af2, bc2, de2, hl2, sp, pc, ix, iy, wz;
u8 i, r;
stream.read(reinterpret_cast<char*> (&af), sizeof(af));
stream.read(reinterpret_cast<char*> (&bc), sizeof(bc));
stream.read(reinterpret_cast<char*> (&de), sizeof(de));
stream.read(reinterpret_cast<char*> (&hl), sizeof(hl));
stream.read(reinterpret_cast<char*> (&af2), sizeof(af2));
stream.read(reinterpret_cast<char*> (&bc2), sizeof(bc2));
stream.read(reinterpret_cast<char*> (&de2), sizeof(de2));
stream.read(reinterpret_cast<char*> (&hl2), sizeof(hl2));
stream.read(reinterpret_cast<char*> (&sp), sizeof(sp));
stream.read(reinterpret_cast<char*> (&pc), sizeof(pc));
stream.read(reinterpret_cast<char*> (&ix), sizeof(ix));
stream.read(reinterpret_cast<char*> (&iy), sizeof(iy));
stream.read(reinterpret_cast<char*> (&wz), sizeof(wz));
stream.read(reinterpret_cast<char*> (&i), sizeof(i));
stream.read(reinterpret_cast<char*> (&r), sizeof(r));
AF.SetValue(af);
BC.SetValue(bc);
DE.SetValue(de);
HL.SetValue(hl);
AF2.SetValue(af2);
BC2.SetValue(bc2);
DE2.SetValue(de2);
HL2.SetValue(hl2);
SP.SetValue(sp);
PC.SetValue(pc);
IX.SetValue(ix);
IY.SetValue(iy);
WZ.SetValue(wz);
I = i;
R = r;
stream.read(reinterpret_cast<char*> (&m_bIFF1), sizeof(m_bIFF1));
stream.read(reinterpret_cast<char*> (&m_bIFF2), sizeof(m_bIFF2));
stream.read(reinterpret_cast<char*> (&m_bHalt), sizeof(m_bHalt));
stream.read(reinterpret_cast<char*> (&m_bBranchTaken), sizeof(m_bBranchTaken));
stream.read(reinterpret_cast<char*> (&m_iTStates), sizeof(m_iTStates));
stream.read(reinterpret_cast<char*> (&m_bAfterEI), sizeof(m_bAfterEI));
stream.read(reinterpret_cast<char*> (&m_iInterruptMode), sizeof(m_iInterruptMode));
stream.read(reinterpret_cast<char*> (&m_CurrentPrefix), sizeof(m_CurrentPrefix));
stream.read(reinterpret_cast<char*> (&m_bINTRequested), sizeof(m_bINTRequested));
stream.read(reinterpret_cast<char*> (&m_bNMIRequested), sizeof(m_bNMIRequested));
stream.read(reinterpret_cast<char*> (&m_bPrefixedCBOpcode), sizeof(m_bPrefixedCBOpcode));
stream.read(reinterpret_cast<char*> (&m_PrefixedCBValue), sizeof(m_PrefixedCBValue));
stream.read(reinterpret_cast<char*> (&m_bInputLastCycle), sizeof(m_bInputLastCycle));
}
void Processor::SetProActionReplayCheat(const char* szCheat)
{
std::string code(szCheat);
for (std::string::iterator p = code.begin(); code.end() != p; ++p)
*p = toupper(*p);
if ((code.length() == 8) || (code.length() == 9))
{
int offset = 0;
if (code.length() == 8)
{
offset = 1;
}
ProActionReplayCode par;
par.value = (AsHex(code[7-offset]) << 4 | AsHex(code[8-offset])) & 0xFF;
par.address = ((AsHex(code[2]) << 12) | (AsHex(code[3]) << 8) | (AsHex(code[5-offset]) << 4) | AsHex(code[6-offset])) & 0xFFFF;
m_ProActionReplayList.push_back(par);
}
}
void Processor::ClearProActionReplayCheats()
{
m_ProActionReplayList.clear();
}
void Processor::UpdateProActionReplay()
{
std::list<ProActionReplayCode>::iterator it;
for (it = m_ProActionReplayList.begin(); it != m_ProActionReplayList.end(); it++)
{
m_pMemory->Write(it->address, it->value);
}
}
Processor::ProcessorState* Processor::GetState()
{
return &m_ProcessorState;
}
void Processor::InitOPCodeFunctors()
{
m_OPCodes[0x00] = &Processor::OPCode0x00;
m_OPCodes[0x01] = &Processor::OPCode0x01;
m_OPCodes[0x02] = &Processor::OPCode0x02;
m_OPCodes[0x03] = &Processor::OPCode0x03;
m_OPCodes[0x04] = &Processor::OPCode0x04;
m_OPCodes[0x05] = &Processor::OPCode0x05;
m_OPCodes[0x06] = &Processor::OPCode0x06;
m_OPCodes[0x07] = &Processor::OPCode0x07;
m_OPCodes[0x08] = &Processor::OPCode0x08;
m_OPCodes[0x09] = &Processor::OPCode0x09;
m_OPCodes[0x0A] = &Processor::OPCode0x0A;
m_OPCodes[0x0B] = &Processor::OPCode0x0B;
m_OPCodes[0x0C] = &Processor::OPCode0x0C;
m_OPCodes[0x0D] = &Processor::OPCode0x0D;
m_OPCodes[0x0E] = &Processor::OPCode0x0E;
m_OPCodes[0x0F] = &Processor::OPCode0x0F;
m_OPCodes[0x10] = &Processor::OPCode0x10;
m_OPCodes[0x11] = &Processor::OPCode0x11;
m_OPCodes[0x12] = &Processor::OPCode0x12;
m_OPCodes[0x13] = &Processor::OPCode0x13;
m_OPCodes[0x14] = &Processor::OPCode0x14;
m_OPCodes[0x15] = &Processor::OPCode0x15;
m_OPCodes[0x16] = &Processor::OPCode0x16;
m_OPCodes[0x17] = &Processor::OPCode0x17;
m_OPCodes[0x18] = &Processor::OPCode0x18;
m_OPCodes[0x19] = &Processor::OPCode0x19;
m_OPCodes[0x1A] = &Processor::OPCode0x1A;
m_OPCodes[0x1B] = &Processor::OPCode0x1B;
m_OPCodes[0x1C] = &Processor::OPCode0x1C;
m_OPCodes[0x1D] = &Processor::OPCode0x1D;
m_OPCodes[0x1E] = &Processor::OPCode0x1E;
m_OPCodes[0x1F] = &Processor::OPCode0x1F;
m_OPCodes[0x20] = &Processor::OPCode0x20;
m_OPCodes[0x21] = &Processor::OPCode0x21;
m_OPCodes[0x22] = &Processor::OPCode0x22;
m_OPCodes[0x23] = &Processor::OPCode0x23;
m_OPCodes[0x24] = &Processor::OPCode0x24;
m_OPCodes[0x25] = &Processor::OPCode0x25;
m_OPCodes[0x26] = &Processor::OPCode0x26;
m_OPCodes[0x27] = &Processor::OPCode0x27;
m_OPCodes[0x28] = &Processor::OPCode0x28;
m_OPCodes[0x29] = &Processor::OPCode0x29;
m_OPCodes[0x2A] = &Processor::OPCode0x2A;
m_OPCodes[0x2B] = &Processor::OPCode0x2B;
m_OPCodes[0x2C] = &Processor::OPCode0x2C;
m_OPCodes[0x2D] = &Processor::OPCode0x2D;
m_OPCodes[0x2E] = &Processor::OPCode0x2E;
m_OPCodes[0x2F] = &Processor::OPCode0x2F;
m_OPCodes[0x30] = &Processor::OPCode0x30;
m_OPCodes[0x31] = &Processor::OPCode0x31;
m_OPCodes[0x32] = &Processor::OPCode0x32;
m_OPCodes[0x33] = &Processor::OPCode0x33;
m_OPCodes[0x34] = &Processor::OPCode0x34;
m_OPCodes[0x35] = &Processor::OPCode0x35;
m_OPCodes[0x36] = &Processor::OPCode0x36;
m_OPCodes[0x37] = &Processor::OPCode0x37;
m_OPCodes[0x38] = &Processor::OPCode0x38;
m_OPCodes[0x39] = &Processor::OPCode0x39;
m_OPCodes[0x3A] = &Processor::OPCode0x3A;
m_OPCodes[0x3B] = &Processor::OPCode0x3B;
m_OPCodes[0x3C] = &Processor::OPCode0x3C;
m_OPCodes[0x3D] = &Processor::OPCode0x3D;
m_OPCodes[0x3E] = &Processor::OPCode0x3E;
m_OPCodes[0x3F] = &Processor::OPCode0x3F;
m_OPCodes[0x40] = &Processor::OPCode0x40;
m_OPCodes[0x41] = &Processor::OPCode0x41;
m_OPCodes[0x42] = &Processor::OPCode0x42;
m_OPCodes[0x43] = &Processor::OPCode0x43;
m_OPCodes[0x44] = &Processor::OPCode0x44;
m_OPCodes[0x45] = &Processor::OPCode0x45;
m_OPCodes[0x46] = &Processor::OPCode0x46;
m_OPCodes[0x47] = &Processor::OPCode0x47;
m_OPCodes[0x48] = &Processor::OPCode0x48;
m_OPCodes[0x49] = &Processor::OPCode0x49;
m_OPCodes[0x4A] = &Processor::OPCode0x4A;
m_OPCodes[0x4B] = &Processor::OPCode0x4B;
m_OPCodes[0x4C] = &Processor::OPCode0x4C;
m_OPCodes[0x4D] = &Processor::OPCode0x4D;
m_OPCodes[0x4E] = &Processor::OPCode0x4E;
m_OPCodes[0x4F] = &Processor::OPCode0x4F;
m_OPCodes[0x50] = &Processor::OPCode0x50;
m_OPCodes[0x51] = &Processor::OPCode0x51;
m_OPCodes[0x52] = &Processor::OPCode0x52;
m_OPCodes[0x53] = &Processor::OPCode0x53;
m_OPCodes[0x54] = &Processor::OPCode0x54;
m_OPCodes[0x55] = &Processor::OPCode0x55;
m_OPCodes[0x56] = &Processor::OPCode0x56;
m_OPCodes[0x57] = &Processor::OPCode0x57;
m_OPCodes[0x58] = &Processor::OPCode0x58;
m_OPCodes[0x59] = &Processor::OPCode0x59;
m_OPCodes[0x5A] = &Processor::OPCode0x5A;
m_OPCodes[0x5B] = &Processor::OPCode0x5B;
m_OPCodes[0x5C] = &Processor::OPCode0x5C;
m_OPCodes[0x5D] = &Processor::OPCode0x5D;
m_OPCodes[0x5E] = &Processor::OPCode0x5E;
m_OPCodes[0x5F] = &Processor::OPCode0x5F;
m_OPCodes[0x60] = &Processor::OPCode0x60;
m_OPCodes[0x61] = &Processor::OPCode0x61;
m_OPCodes[0x62] = &Processor::OPCode0x62;
m_OPCodes[0x63] = &Processor::OPCode0x63;
m_OPCodes[0x64] = &Processor::OPCode0x64;
m_OPCodes[0x65] = &Processor::OPCode0x65;
m_OPCodes[0x66] = &Processor::OPCode0x66;
m_OPCodes[0x67] = &Processor::OPCode0x67;
m_OPCodes[0x68] = &Processor::OPCode0x68;
m_OPCodes[0x69] = &Processor::OPCode0x69;
m_OPCodes[0x6A] = &Processor::OPCode0x6A;
m_OPCodes[0x6B] = &Processor::OPCode0x6B;
m_OPCodes[0x6C] = &Processor::OPCode0x6C;
m_OPCodes[0x6D] = &Processor::OPCode0x6D;
m_OPCodes[0x6E] = &Processor::OPCode0x6E;
m_OPCodes[0x6F] = &Processor::OPCode0x6F;
m_OPCodes[0x70] = &Processor::OPCode0x70;
m_OPCodes[0x71] = &Processor::OPCode0x71;
m_OPCodes[0x72] = &Processor::OPCode0x72;
m_OPCodes[0x73] = &Processor::OPCode0x73;
m_OPCodes[0x74] = &Processor::OPCode0x74;
m_OPCodes[0x75] = &Processor::OPCode0x75;
m_OPCodes[0x76] = &Processor::OPCode0x76;
m_OPCodes[0x77] = &Processor::OPCode0x77;
m_OPCodes[0x78] = &Processor::OPCode0x78;
m_OPCodes[0x79] = &Processor::OPCode0x79;
m_OPCodes[0x7A] = &Processor::OPCode0x7A;
m_OPCodes[0x7B] = &Processor::OPCode0x7B;
m_OPCodes[0x7C] = &Processor::OPCode0x7C;
m_OPCodes[0x7D] = &Processor::OPCode0x7D;
m_OPCodes[0x7E] = &Processor::OPCode0x7E;
m_OPCodes[0x7F] = &Processor::OPCode0x7F;
m_OPCodes[0x80] = &Processor::OPCode0x80;
m_OPCodes[0x81] = &Processor::OPCode0x81;
m_OPCodes[0x82] = &Processor::OPCode0x82;
m_OPCodes[0x83] = &Processor::OPCode0x83;
m_OPCodes[0x84] = &Processor::OPCode0x84;
m_OPCodes[0x85] = &Processor::OPCode0x85;
m_OPCodes[0x86] = &Processor::OPCode0x86;
m_OPCodes[0x87] = &Processor::OPCode0x87;
m_OPCodes[0x88] = &Processor::OPCode0x88;
m_OPCodes[0x89] = &Processor::OPCode0x89;
m_OPCodes[0x8A] = &Processor::OPCode0x8A;
m_OPCodes[0x8B] = &Processor::OPCode0x8B;
m_OPCodes[0x8C] = &Processor::OPCode0x8C;
m_OPCodes[0x8D] = &Processor::OPCode0x8D;
m_OPCodes[0x8E] = &Processor::OPCode0x8E;
m_OPCodes[0x8F] = &Processor::OPCode0x8F;
m_OPCodes[0x90] = &Processor::OPCode0x90;
m_OPCodes[0x91] = &Processor::OPCode0x91;
m_OPCodes[0x92] = &Processor::OPCode0x92;
m_OPCodes[0x93] = &Processor::OPCode0x93;
m_OPCodes[0x94] = &Processor::OPCode0x94;
m_OPCodes[0x95] = &Processor::OPCode0x95;
m_OPCodes[0x96] = &Processor::OPCode0x96;
m_OPCodes[0x97] = &Processor::OPCode0x97;
m_OPCodes[0x98] = &Processor::OPCode0x98;
m_OPCodes[0x99] = &Processor::OPCode0x99;
m_OPCodes[0x9A] = &Processor::OPCode0x9A;
m_OPCodes[0x9B] = &Processor::OPCode0x9B;
m_OPCodes[0x9C] = &Processor::OPCode0x9C;
m_OPCodes[0x9D] = &Processor::OPCode0x9D;
m_OPCodes[0x9E] = &Processor::OPCode0x9E;
m_OPCodes[0x9F] = &Processor::OPCode0x9F;
m_OPCodes[0xA0] = &Processor::OPCode0xA0;
m_OPCodes[0xA1] = &Processor::OPCode0xA1;
m_OPCodes[0xA2] = &Processor::OPCode0xA2;
m_OPCodes[0xA3] = &Processor::OPCode0xA3;
m_OPCodes[0xA4] = &Processor::OPCode0xA4;
m_OPCodes[0xA5] = &Processor::OPCode0xA5;
m_OPCodes[0xA6] = &Processor::OPCode0xA6;
m_OPCodes[0xA7] = &Processor::OPCode0xA7;
m_OPCodes[0xA8] = &Processor::OPCode0xA8;
m_OPCodes[0xA9] = &Processor::OPCode0xA9;
m_OPCodes[0xAA] = &Processor::OPCode0xAA;
m_OPCodes[0xAB] = &Processor::OPCode0xAB;
m_OPCodes[0xAC] = &Processor::OPCode0xAC;
m_OPCodes[0xAD] = &Processor::OPCode0xAD;
m_OPCodes[0xAE] = &Processor::OPCode0xAE;
m_OPCodes[0xAF] = &Processor::OPCode0xAF;
m_OPCodes[0xB0] = &Processor::OPCode0xB0;
m_OPCodes[0xB1] = &Processor::OPCode0xB1;
m_OPCodes[0xB2] = &Processor::OPCode0xB2;
m_OPCodes[0xB3] = &Processor::OPCode0xB3;
m_OPCodes[0xB4] = &Processor::OPCode0xB4;
m_OPCodes[0xB5] = &Processor::OPCode0xB5;
m_OPCodes[0xB6] = &Processor::OPCode0xB6;
m_OPCodes[0xB7] = &Processor::OPCode0xB7;
m_OPCodes[0xB8] = &Processor::OPCode0xB8;
m_OPCodes[0xB9] = &Processor::OPCode0xB9;
m_OPCodes[0xBA] = &Processor::OPCode0xBA;
m_OPCodes[0xBB] = &Processor::OPCode0xBB;
m_OPCodes[0xBC] = &Processor::OPCode0xBC;
m_OPCodes[0xBD] = &Processor::OPCode0xBD;
m_OPCodes[0xBE] = &Processor::OPCode0xBE;
m_OPCodes[0xBF] = &Processor::OPCode0xBF;
m_OPCodes[0xC0] = &Processor::OPCode0xC0;
m_OPCodes[0xC1] = &Processor::OPCode0xC1;
m_OPCodes[0xC2] = &Processor::OPCode0xC2;
m_OPCodes[0xC3] = &Processor::OPCode0xC3;
m_OPCodes[0xC4] = &Processor::OPCode0xC4;
m_OPCodes[0xC5] = &Processor::OPCode0xC5;
m_OPCodes[0xC6] = &Processor::OPCode0xC6;
m_OPCodes[0xC7] = &Processor::OPCode0xC7;
m_OPCodes[0xC8] = &Processor::OPCode0xC8;
m_OPCodes[0xC9] = &Processor::OPCode0xC9;
m_OPCodes[0xCA] = &Processor::OPCode0xCA;
m_OPCodes[0xCB] = &Processor::OPCode0xCB;
m_OPCodes[0xCC] = &Processor::OPCode0xCC;
m_OPCodes[0xCD] = &Processor::OPCode0xCD;
m_OPCodes[0xCE] = &Processor::OPCode0xCE;
m_OPCodes[0xCF] = &Processor::OPCode0xCF;
m_OPCodes[0xD0] = &Processor::OPCode0xD0;
m_OPCodes[0xD1] = &Processor::OPCode0xD1;
m_OPCodes[0xD2] = &Processor::OPCode0xD2;
m_OPCodes[0xD3] = &Processor::OPCode0xD3;
m_OPCodes[0xD4] = &Processor::OPCode0xD4;
m_OPCodes[0xD5] = &Processor::OPCode0xD5;
m_OPCodes[0xD6] = &Processor::OPCode0xD6;
m_OPCodes[0xD7] = &Processor::OPCode0xD7;
m_OPCodes[0xD8] = &Processor::OPCode0xD8;
m_OPCodes[0xD9] = &Processor::OPCode0xD9;
m_OPCodes[0xDA] = &Processor::OPCode0xDA;
m_OPCodes[0xDB] = &Processor::OPCode0xDB;
m_OPCodes[0xDC] = &Processor::OPCode0xDC;
m_OPCodes[0xDD] = &Processor::OPCode0xDD;
m_OPCodes[0xDE] = &Processor::OPCode0xDE;
m_OPCodes[0xDF] = &Processor::OPCode0xDF;
m_OPCodes[0xE0] = &Processor::OPCode0xE0;
m_OPCodes[0xE1] = &Processor::OPCode0xE1;
m_OPCodes[0xE2] = &Processor::OPCode0xE2;
m_OPCodes[0xE3] = &Processor::OPCode0xE3;
m_OPCodes[0xE4] = &Processor::OPCode0xE4;
m_OPCodes[0xE5] = &Processor::OPCode0xE5;
m_OPCodes[0xE6] = &Processor::OPCode0xE6;
m_OPCodes[0xE7] = &Processor::OPCode0xE7;
m_OPCodes[0xE8] = &Processor::OPCode0xE8;
m_OPCodes[0xE9] = &Processor::OPCode0xE9;
m_OPCodes[0xEA] = &Processor::OPCode0xEA;
m_OPCodes[0xEB] = &Processor::OPCode0xEB;
m_OPCodes[0xEC] = &Processor::OPCode0xEC;
m_OPCodes[0xED] = &Processor::OPCode0xED;
m_OPCodes[0xEE] = &Processor::OPCode0xEE;
m_OPCodes[0xEF] = &Processor::OPCode0xEF;
m_OPCodes[0xF0] = &Processor::OPCode0xF0;
m_OPCodes[0xF1] = &Processor::OPCode0xF1;
m_OPCodes[0xF2] = &Processor::OPCode0xF2;
m_OPCodes[0xF3] = &Processor::OPCode0xF3;
m_OPCodes[0xF4] = &Processor::OPCode0xF4;
m_OPCodes[0xF5] = &Processor::OPCode0xF5;
m_OPCodes[0xF6] = &Processor::OPCode0xF6;
m_OPCodes[0xF7] = &Processor::OPCode0xF7;
m_OPCodes[0xF8] = &Processor::OPCode0xF8;
m_OPCodes[0xF9] = &Processor::OPCode0xF9;
m_OPCodes[0xFA] = &Processor::OPCode0xFA;
m_OPCodes[0xFB] = &Processor::OPCode0xFB;
m_OPCodes[0xFC] = &Processor::OPCode0xFC;
m_OPCodes[0xFD] = &Processor::OPCode0xFD;
m_OPCodes[0xFE] = &Processor::OPCode0xFE;
m_OPCodes[0xFF] = &Processor::OPCode0xFF;