[mono][1/2] Add SIMD Support for s390x #116669
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This is the inital patch to support simd on s390x. on s390x we have 16 floating point registers and 32 vector registers out of which f0 - f15 overlap with v0 - v15. redefine the mirrored_mask logic for unequal masks in the register allocator.
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cc: @uweigand , @nealef, @akoeplinger , @steveisok, @giritrivedi |
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This is a followup patch to dotnet#116669 to add vector support to s390x
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This is a followup patch to dotnet#116669 to add vector support to s390x
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This is a followup patch to dotnet#116669 to add vector support to s390x
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This is a followup patch to dotnet#116669 to add vector support to s390x
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This is a followup patch to dotnet#116669 to add vector support to s390x
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* generalize assert statements for the unequal masks * remove duplicate line
This was referenced Jul 7, 2025
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This LGTM now from a s390x architecture perspective. |
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/ba-g wasm failures are not related to s390x |
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* [mono][2/2] Add SIMD Support for s390x This is a followup patch to #116669 to add vector support to s390x * Address Review Comments * remove SIY_1 (duplicacy) * remove locgrnle and locghinle use locghiho instead * reformat whole patch * remove vflc use vfpso instead * move common op's to a common ifdef in mini-ops * remove NEW_INS , it's used no-where * rewrite the whole logic for Vector conditional ops for floats * update ANDN with vnc instruction * add couple of comments * remove some pseudo op in simd-intrinsics * add aligned loads and stores * Adress Review Comments - 2 * reformat patch - rename opcode from OP_ to OP_S390 * rewrite OP_XCOMPARE and OP_XEXTRACT into one opcode OP_S390_OPXCOMPARE_XEXTRACT * introduce compare neumonics without setting the condition code * rewrite OP_VEC_ABS to handle float and integer separately * Address Review Comments - 3 * remove hard-coded s390_vr16 to allocate a temp_reg instead * omit move incase ins->sreg and ins->dreg
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This is the inital patch to support simd on s390x. on s390x we have 16 floating point registers and 32 vector registers out of which f0 - f15 overlap with v0 - v15.
redefine the mirrored_mask logic for unequal masks in the register allocator.