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[RISC-V] Introduce Zbb #114150
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch |
RISC-V Release-CLR-VF2: 9528 / 9548 (99.79%)
Release-CLR-VF2.md, Release-CLR-VF2.xml, testclr_output.tar.gz Build information and commandsGIT: RISC-V Release-CLR-QEMU: 9528 / 9548 (99.79%)
Release-CLR-QEMU.md, Release-CLR-QEMU.xml, testclr_output.tar.gz Build information and commandsGIT: RISC-V Release-FX-VF2: 456456 / 498016 (91.65%)
Build information and commandsGIT: RISC-V Release-FX-QEMU: 713206 / 741249 (96.22%)
Release-FX-QEMU.md, Release-FX-QEMU.xml, testfx_output.tar.gz Build information and commandsGIT: |
RISC-V Release-CLR-VF2: 9528 / 9548 (99.79%)
Release-CLR-VF2.md, Release-CLR-VF2.xml, testclr_output.tar.gz Build information and commandsGIT: RISC-V Release-FX-VF2: 434315 / 469482 (92.51%)
Build information and commandsGIT: RISC-V Release-CLR-QEMU: 9528 / 9548 (99.79%)
Release-CLR-QEMU.md, Release-CLR-QEMU.xml, testclr_output.tar.gz Build information and commandsGIT: |
69200b1 is being scheduled for building and testingGIT: |
No regressions, I'll look what's the missed context Diffs are based on 171,584 contexts (22,709 MinOpts, 148,875 FullOpts). MISSED contexts: base: 0 (0.00%), diff: 1 (0.00%) Overall (-486,920 bytes)
MinOpts (-90,700 bytes)
FullOpts (-396,220 bytes)
Example diffslinux.riscv64.Checked.mch-16 (-30.77%) : 41224.dasm - Internal.VersionResilientHashCode:RotateLeft(int,int):int (FullOpts)@@ -22,19 +22,15 @@ G_M25405_IG01: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref,
mv fp, sp,
;; size=16 bbWeight=1 PerfScore 9.00
G_M25405_IG02: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0000 {}, byref
- addi a2, zero, 0xD1FFAB1E
- sub a2, a2, a1
- srlw ra, a0, a2
- sllw a2, a0, a1
- or a0, ra, a2
- ;; size=20 bbWeight=1 PerfScore 2.50
+ rolw a0, a0, a1
+ ;; size=4 bbWeight=1 PerfScore 0.50
G_M25405_IG03: ; bbWeight=1, epilog, nogc, extend
ld ra, 8(sp)
ld fp, 0(sp)
addi sp, sp, 16
ret ;; size=16 bbWeight=1 PerfScore 7.50
-; Total bytes of code 52, prolog size 16, PerfScore 19.00, instruction count 13, allocated bytes for code 52 (MethodHash=d2d19cc2) for method Internal.VersionResilientHashCode:RotateLeft(int,int):int (FullOpts)
+; Total bytes of code 36, prolog size 16, PerfScore 17.00, instruction count 9, allocated bytes for code 36 (MethodHash=d2d19cc2) for method Internal.VersionResilientHashCode:RotateLeft(int,int):int (FullOpts)
; ============================================================
Unwind Info:
@@ -45,7 +41,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 13 (0x0000d) Actual length = 52 (0x000034)
+ Function Length : 9 (0x00009) Actual length = 36 (0x000024)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e) -16 (-28.57%) : 12453.dasm - System.Numerics.Tensors.TensorPrimitives+RotateRightOperator`1[int]:Invoke(int):int:this (FullOpts)@@ -26,19 +26,15 @@ G_M45139_IG02: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0400 {a0}, byre
; byrRegs +[a0]
lw a0, 0xD1FFAB1E(a0)
; byrRegs -[a0]
- addi a2, zero, 0xD1FFAB1E
- sub a2, a2, a0
- srlw ra, a1, a0
- sllw a2, a1, a2
- or a0, ra, a2
- ;; size=24 bbWeight=1 PerfScore 4.50
+ rorw a0, a1, a0
+ ;; size=8 bbWeight=1 PerfScore 2.50
G_M45139_IG03: ; bbWeight=1, epilog, nogc, extend
ld ra, 8(sp)
ld fp, 0(sp)
addi sp, sp, 16
ret ;; size=16 bbWeight=1 PerfScore 7.50
-; Total bytes of code 56, prolog size 16, PerfScore 21.00, instruction count 14, allocated bytes for code 56 (MethodHash=f0874fac) for method System.Numerics.Tensors.TensorPrimitives+RotateRightOperator`1[int]:Invoke(int):int:this (FullOpts)
+; Total bytes of code 40, prolog size 16, PerfScore 19.00, instruction count 10, allocated bytes for code 40 (MethodHash=f0874fac) for method System.Numerics.Tensors.TensorPrimitives+RotateRightOperator`1[int]:Invoke(int):int:this (FullOpts)
; ============================================================
Unwind Info:
@@ -49,7 +45,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 14 (0x0000e) Actual length = 56 (0x000038)
+ Function Length : 10 (0x0000a) Actual length = 40 (0x000028)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e) -16 (-28.57%) : 12454.dasm - System.Numerics.Tensors.TensorPrimitives+RotateRightOperator`1[long]:Invoke(long):long:this (FullOpts)@@ -26,19 +26,15 @@ G_M38666_IG02: ; bbWeight=1, gcrefRegs=0000 {}, byrefRegs=0400 {a0}, byre
; byrRegs +[a0]
lw a0, 0xD1FFAB1E(a0)
; byrRegs -[a0]
- addi a2, zero, 0xD1FFAB1E
- sub a2, a2, a0
- srl ra, a1, a0
- sll a2, a1, a2
- or a0, ra, a2
- ;; size=24 bbWeight=1 PerfScore 4.50
+ ror a0, a1, a0
+ ;; size=8 bbWeight=1 PerfScore 2.50
G_M38666_IG03: ; bbWeight=1, epilog, nogc, extend
ld ra, 8(sp)
ld fp, 0(sp)
addi sp, sp, 16
ret ;; size=16 bbWeight=1 PerfScore 7.50
-; Total bytes of code 56, prolog size 16, PerfScore 21.00, instruction count 14, allocated bytes for code 56 (MethodHash=676968f5) for method System.Numerics.Tensors.TensorPrimitives+RotateRightOperator`1[long]:Invoke(long):long:this (FullOpts)
+; Total bytes of code 40, prolog size 16, PerfScore 19.00, instruction count 10, allocated bytes for code 40 (MethodHash=676968f5) for method System.Numerics.Tensors.TensorPrimitives+RotateRightOperator`1[long]:Invoke(long):long:this (FullOpts)
; ============================================================
Unwind Info:
@@ -49,7 +45,7 @@ Unwind Info:
E bit : 0
X bit : 0
Vers : 0
- Function Length : 14 (0x0000e) Actual length = 56 (0x000038)
+ Function Length : 10 (0x0000a) Actual length = 40 (0x000028)
---- Epilog scopes ----
---- Scope 0
Epilog Start Offset : 3523193630 (0xd1ffab1e) Actual offset = 3523193630 (0xd1ffab1e) Offset from main function begin = 3523193630 (0xd1ffab1e) +0 (0.00%) : 171536.dasm - Generated442:StructConstrainedInterfaceCallsTest() (FullOpts)No diffs found? +0 (0.00%) : 171472.dasm - ValueNumberingCheckedCastsOfConstants:g__ConfirmUInt64OneDecrementUnderUInt64MaxValueCastToUInt32Overflows|97_24() (FullOpts)No diffs found? +0 (0.00%) : 171440.dasm - ValueNumberingCheckedCastsOfConstants:g__ConfirmUInt32MaxValueCastToInt32Overflows|96_17() (FullOpts)No diffs found? DetailsSize improvements/regressions per collection
PerfScore improvements/regressions per collection
Context information
jit-analyze output |
Conflicts: src/coreclr/jit/emitriscv64.cpp
RISC-V Release-CLR-VF2: 9529 / 9549 (99.79%)
Release-CLR-VF2.md, Release-CLR-VF2.xml, testclr_output.tar.gz Build information and commandsGIT: RISC-V Release-FX-QEMU: 631076 / 660256 (95.58%)
Release-FX-QEMU.md, Release-FX-QEMU.xml, testfx_output.tar.gz Build information and commandsGIT: RISC-V Release-FX-VF2: 636810 / 664988 (95.76%)
Build information and commandsGIT: RISC-V Release-CLR-QEMU: 9529 / 9549 (99.79%)
Release-CLR-QEMU.md, Release-CLR-QEMU.xml, testclr_output.tar.gz Build information and commandsGIT: |
Conflicts: src/coreclr/jit/emitriscv64.cpp src/coreclr/jit/instrsriscv64.h
RISC-V Release-CLR-VF2: 9532 / 9552 (99.79%)
Release-CLR-VF2.md, Release-CLR-VF2.xml, testclr_output.tar.gz Build information and commandsGIT: RISC-V Release-FX-QEMU: 633735 / 662830 (95.61%)
Release-FX-QEMU.md, Release-FX-QEMU.xml, testfx_output.tar.gz Build information and commandsGIT: RISC-V Release-CLR-QEMU: 9532 / 9552 (99.79%)
Release-CLR-QEMU.md, Release-CLR-QEMU.xml, testclr_output.tar.gz Build information and commandsGIT: |
RISC-V Release-CLR-VF2: 9540 / 9589 (99.49%)
Release-CLR-VF2.md, Release-CLR-VF2.xml, testclr_output.tar.gz Build information and commandsGIT: RISC-V Release-FX-QEMU: 644845 / 669056 (96.38%)
Release-FX-QEMU.md, Release-FX-QEMU.xml, testfx_output.tar.gz Build information and commandsGIT: RISC-V Release-CLR-QEMU: 9541 / 9589 (99.50%)
Release-CLR-QEMU.md, Release-CLR-QEMU.xml, testclr_output.tar.gz Build information and commandsGIT: |
Interesting that 4 days ago:
and in the next run 2 days ago:
Is this a flakiness in test orchestration that it can sometimes run the skipped tests or were there as many tests enabled in two days? 👀 @tomeksowi if you could rerun the tests and it goes back to 99.79%, then it's former and something which should be looked at from runtime infra viewpoint. We can open an issue with build+test commands executed by risc-vv as steps to repro. |
Let's try. But risc-vv is running tests after merging with latest main (the report could be clearer about that) so it could be a regression. I fixed some varargs not supported tests e.g. in #112399, the number of tests increased 9552 to 9589 so it maybe similar this time, I'll check on Monday. |
The markdown report could also include build and test commands. Infra is constantly undergoing refactoring, so we can test those commands during that type of work to avoid breakage. |
RISC-V Release-CLR-VF2: 9542 / 9590 (99.50%)
Release-CLR-VF2.md, Release-CLR-VF2.xml, testclr_output.tar.gz Build information and commandsGIT: RISC-V Release-CLR-QEMU: 9542 / 9590 (99.50%)
Release-CLR-QEMU.md, Release-CLR-QEMU.xml, testclr_output.tar.gz Build information and commandsGIT: RISC-V Release-FX-QEMU: 633600 / 657795 (96.32%)
Release-FX-QEMU.md, Release-FX-QEMU.xml, testfx_output.tar.gz Build information and commandsGIT: |
7b78b54 is being scheduled for building and testingGIT: |
Probably our CI script ignores some entries from issues.targets (@sirntar is working on it). I ran |
src/coreclr/jit/emitriscv64.cpp
RISC-V Release-CLR-VF2: 9702 / 9750 (99.51%)
Release-CLR-VF2.md, Release-CLR-VF2.xml, testclr_output.tar.gz Build information and commandsGIT: RISC-V Release-CLR-QEMU: 9702 / 9750 (99.51%)
Release-CLR-QEMU.md, Release-CLR-QEMU.xml, testclr_output.tar.gz Build information and commandsGIT: RISC-V Release-FX-QEMU: 720592 / 744909 (96.74%)
Release-FX-QEMU.md, Release-FX-QEMU.xml, testfx_output.tar.gz Build information and commandsGIT: |
Accelerate some codegens with Zbb instructions.
Part of #84834, cc @dotnet/samsung