[LoongArch64] Remove the register tp from callee saved registers in coreclr. #108696
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@shushanhf Could you please review this PR? |
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Oct 12, 2024
| @@ -375,7 +375,7 @@ SIZE_T GetRegOffsInCONTEXT(ICorDebugInfo::RegNum regNum) | |||
| { | |||
| case ICorDebugInfo::REGNUM_R0: return offsetof(T_CONTEXT, R0); | |||
| case ICorDebugInfo::REGNUM_RA: return offsetof(T_CONTEXT, Ra); | |||
| case ICorDebugInfo::REGNUM_TP: return offsetof(T_CONTEXT, Tp); | |||
| //case ICorDebugInfo::REGNUM_TP: return offsetof(T_CONTEXT, Tp); | |||
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Previously in LoongArch, most of the code in CoreCLR treated the TP register as a callee saved register. But actually, the TP register in LoongArch is a thread pointer and should not be used as a callee saved register.